【摘要】：近年我國(guó)在航天領(lǐng)域長(zhǎng)足進(jìn)步，因其特殊的航天背景，自主知識(shí)產(chǎn)權(quán)的處理器設(shè)計(jì)對(duì)于航天嵌入式系統(tǒng)來(lái)說(shuō)具有極高的戰(zhàn)略意義。同時(shí)，因?yàn)楹教鞂?zhuān)用處理器的高輻射空間工作環(huán)境問(wèn)題，單粒子翻轉(zhuǎn)引起的處理器失效問(wèn)題不容忽視，所以針對(duì)此問(wèn)題的處理器加固是必不可少的。 本文對(duì)比研究了CISC和RISC架構(gòu)的處理器，因航天專(zhuān)用處理器功能相對(duì)精簡(jiǎn)單一的原因，本文的處理器設(shè)計(jì)選用指令更精簡(jiǎn)的RISC架構(gòu)。本文的處理器設(shè)計(jì)采用Top-Down思路，將處理器由頂層劃分至四級(jí)流水線結(jié)構(gòu)，提高了指令的執(zhí)行效率，再將每級(jí)流水操作單元向下劃分為各個(gè)具體功能單元，以實(shí)現(xiàn)總體設(shè)計(jì)。本文針對(duì)航天專(zhuān)用處理器易失效的結(jié)構(gòu)進(jìn)行分析，總結(jié)多種失效機(jī)制，對(duì)比分析指出其中寄存器單元最易受單粒子翻轉(zhuǎn)影響，采用海明碼編碼和三模冗余的兩種加固方法，實(shí)現(xiàn)對(duì)處理器的防單粒子翻轉(zhuǎn)加固設(shè)計(jì)。 使用高層次語(yǔ)言結(jié)構(gòu)的方法，對(duì)電路設(shè)計(jì)進(jìn)行功能驗(yàn)證。驗(yàn)證結(jié)果表明，處理器及其加固的設(shè)計(jì)能夠正常工作，滿(mǎn)足了設(shè)計(jì)的預(yù)期規(guī)格。
[Abstract]:In recent years, China has made great progress in the field of spaceflight. Because of its special space background, the processor design of independent intellectual property rights is of great strategic significance for aerospace embedded systems. At the same time, because of the high radiation space working environment of aerospace special processor, the processor failure caused by single particle flip can not be ignored, so it is necessary to strengthen the processor to solve this problem. In this paper, the processors of CISC and RISC are compared and studied. Because of the relatively simple and single function of aerospace special processors, the RISC architecture with simpler instructions is selected in the processor design of this paper. The processor design of this paper adopts the idea of Top-Down, divides the processor from the top level to the four-stage pipeline structure, improves the execution efficiency of the instruction, and then divides the pipeline operation unit of each level down into each specific functional unit, so as to realize the overall design. In this paper, the failure structure of aerospace special processor is analyzed, and a variety of failure mechanisms are summarized. It is pointed out that the register unit is most easily affected by single particle flip, and two reinforcement methods of hamming code coding and three-mode redundancy are adopted. The design of anti-single particle flip reinforcement of processor is realized. The function of circuit design is verified by using the method of high level language structure. The verification results show that the design of the processor and its reinforcement can work normally and meet the expected specifications of the design.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2013
【分類(lèi)號(hào)】：TP332

【相似文獻(xiàn)】

相關(guān)期刊論文 前10條

1 岳云;嵌入式RISC處理器技術(shù)的發(fā)展現(xiàn)狀[J];今日電子;2002年08期

2 ;RISController系列喜添新成員 IDT推出64位全新高效能微處理器[J];世界電子元器件;1998年12期

3 李高積;32位單片RISC微型計(jì)算機(jī)V850系列[J];今日電子;1995年08期

4 齊家月，沙t�，，智{蟮攏嫦

本文編號(hào)：2494574