發(fā)布時(shí)間：2018-05-03 14:06

  本文選題：星載測控設(shè)備 + 背板總線�。� 參考：《西安電子科技大學(xué)》2013年碩士論文

【摘要】：隨著衛(wèi)星電子系統(tǒng)的升級，綜合模塊化系統(tǒng)已經(jīng)成為衛(wèi)星電子系統(tǒng)的發(fā)展趨勢，為了實(shí)現(xiàn)星載電子系統(tǒng)中測控設(shè)備內(nèi)部各模塊間高效率、高可靠的通信，本論文開發(fā)了一種用于衛(wèi)星測控設(shè)備內(nèi)部的背板總線，該總線不僅具有高可靠性的數(shù)據(jù)傳輸功能，而且將數(shù)據(jù)采集與指令分發(fā)功能集成于總線的遠(yuǎn)程終端中，該測控背板總線的開發(fā)將為衛(wèi)星測控設(shè)備提供一種嶄新的系統(tǒng)解決方案。 本論文首先在對多種總線調(diào)研的基礎(chǔ)上，結(jié)合星載測控設(shè)備的實(shí)際工程需求，提出了一種新型星載測控設(shè)備背板總線的設(shè)計(jì)方案，并詳細(xì)介紹了該背板總線的總線形式、觸發(fā)方式與拓?fù)浣Y(jié)構(gòu)等；緊接著在對集成電路開發(fā)流程調(diào)研的基礎(chǔ)上，，完成了背板總線遠(yuǎn)程測控終端中總線接口與測控專用集成電路的開發(fā)，并描述了總線接口與測控專用集成電路的FPGA原型開發(fā)過程，詳細(xì)介紹了每個(gè)功能模塊的設(shè)計(jì)；然后設(shè)計(jì)了總線接口與測控專用集成電路的芯片測試平臺(tái)，完成對專用集成電路的功能測試；在文章的最后，對本論文所做工作進(jìn)行總結(jié)，并針對本設(shè)計(jì)不足之處提出改進(jìn)目標(biāo)。 測試與實(shí)驗(yàn)結(jié)果表明：總線接口與測控專用集成電路功能正常，性能基本滿足設(shè)計(jì)需求；星載電子設(shè)備背板總線通信功能正常，測得總線上信號(hào)波形理想，驗(yàn)證了背板總線的可行性。
[Abstract]:With the upgrading of satellite electronic system, integrated modularization system has become the development trend of satellite electronic system. In order to realize the high efficiency and high reliability communication between the modules of the measurement and control equipment in the spaceborne electronic system, In this paper, a backplane bus is developed for satellite measurement and control equipment. The bus not only has the function of high reliability data transmission, but also integrates the functions of data acquisition and instruction distribution into the remote terminal of the bus. The development of the backplane bus will provide a new system solution for satellite TT & C equipment. Based on the investigation of various kinds of buses and the actual engineering requirements of spaceborne measurement and control equipment, a new design scheme of backplane bus for spaceborne measurement and control equipment is put forward in this paper, and the bus form of the backplane bus is introduced in detail. On the basis of the investigation of the integrated circuit development process, the development of the bus interface and the measurement and control special integrated circuit in the remote measurement and control terminal based on the backplane bus is completed. The FPGA prototype development process of bus interface and measurement and control ASIC is described, and the design of each functional module is introduced in detail, and then the chip test platform of bus interface and measurement and control ASIC is designed. At the end of the paper, the paper summarizes the work done in this paper, and puts forward the improvement goal in view of the shortcomings of the design. The test and experimental results show that the function of bus interface and measurement and control ASIC is normal, the performance basically meets the design requirements, the communication function of backplane bus of spaceborne electronic equipment is normal, and the signal waveform measured on the bus is ideal. The feasibility of backplane bus is verified.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2013
【分類號(hào)】：TP336

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