【摘要】：隨著集成電路的迅速發(fā)展,人們對(duì)于處理器的性能要求也越來越高,尤其在數(shù)值計(jì)算方面,既要求能夠保證足夠的速度和精度,又希望能有效的控制硬件面積和功耗。浮點(diǎn)數(shù)據(jù)的計(jì)算已經(jīng)成為大多數(shù)處理器的基本要求,除了需要完成簡(jiǎn)單的浮點(diǎn)加法、減法和乘法運(yùn)算以外,還要求能夠完成一些初等函數(shù)運(yùn)算,例如倒數(shù)、平方根、平方根倒數(shù)、指數(shù)、對(duì)數(shù)等等。 本文主要研究的是在單精度浮點(diǎn)數(shù)領(lǐng)域的初等函數(shù)運(yùn)算器低成本設(shè)計(jì),比較適用于移動(dòng)設(shè)備中。通過對(duì)初等函數(shù)實(shí)現(xiàn)方法的研究,基于查找表的分段多項(xiàng)式逼近方法是目前單精度初等函數(shù)逼近最理想的方法,它不但在查找表面積與計(jì)算速度兩方面做了很好的平衡,而且能夠?qū)崿F(xiàn)絕大多數(shù)的初等函數(shù)運(yùn)算。 本文利用相鄰區(qū)間參數(shù)約束的理論,在不造成過大誤差的前提下,有效地減少了多項(xiàng)式逼近中所需要存儲(chǔ)的參數(shù)數(shù)量,并且通過MILP(混合整型規(guī)劃)問題優(yōu)化誤差。在二次多項(xiàng)式運(yùn)算部分,利用乘法分配率進(jìn)行形式變換,將一次平方運(yùn)算、兩次乘法運(yùn)算和三次加法運(yùn)算轉(zhuǎn)化為兩次乘加運(yùn)算,并通過復(fù)用乘加結(jié)構(gòu)完成運(yùn)算。對(duì)于華萊士樹進(jìn)行截?cái)嗵幚?有效減少了硬件邏輯。結(jié)果證明總的運(yùn)算部分的面積能夠減少40%,包括查找表和多項(xiàng)式計(jì)算兩部分。同時(shí)針對(duì)浮點(diǎn)格式數(shù)據(jù),本文還加入了預(yù)處理和后處理模塊,整個(gè)設(shè)計(jì)在SMIC0.18um工藝下進(jìn)行綜合,時(shí)鐘頻率可以達(dá)到300MHz,而面積為0.22mm2。
[Abstract]:With the rapid development of integrated circuits, the performance requirements of processors become higher and higher, especially in numerical computation, not only to ensure sufficient speed and accuracy, but also to control the hardware area and power consumption effectively. Floating-point data calculation has become the basic requirement of most processors, in addition to the need to complete simple floating-point addition, subtraction and multiplication, but also to be able to complete some elementary function operations, such as reciprocal, square root, Square-root reciprocal, exponent, logarithm, etc. This paper focuses on the low-cost design of elementary function operators in the field of single-precision floating-point numbers, which is more suitable for mobile devices. Through the research on the realization method of elementary function, the piecewise polynomial approximation method based on look-up table is the most ideal method for single-precision elementary function approximation at present. It not only makes a good balance between the search surface area and the calculation speed, but also has a good balance between the searching surface area and the computing speed. And can realize the vast majority of elementary function operation. In this paper, the theory of parameter constraints in adjacent interval is used to reduce effectively the number of parameters stored in polynomial approximation without causing too much error, and the optimization error of MILP (mixed integral programming) problem is adopted. In the second order polynomial operation part, the multiplicative distribution rate is used to carry on the formal transformation, the first square operation, the two times multiplication operation and the three times addition operation are transformed into the two times multiplication and addition operation, and the operation is completed by the multiplex multiplication and addition structure. The hardware logic is effectively reduced by truncating the Wallace tree. The results show that the total area of the operation can be reduced by 40%, including lookup table and polynomial calculation. At the same time, the pre-processing and post-processing modules are added to the floating-point format data. The whole design is synthesized in SMIC0.18um process. The clock frequency can reach 300 MHz and the area is 0.22 Mm2.
【學(xué)位授予單位】：浙江大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2013
【分類號(hào)】：TP332.2

【參考文獻(xiàn)】

相關(guān)期刊論文 前2條

1 焦繼業(yè);穆榮;郝躍;劉有耀;;面向移動(dòng)圖形頂點(diǎn)處理器的高性能低功耗定點(diǎn)特殊函數(shù)運(yùn)算單元設(shè)計(jì)[J];電子與信息學(xué)報(bào);2011年11期

2 牟勝梅;李兆剛;;一種面向FPGA的指/對(duì)數(shù)函數(shù)求值算法[J];計(jì)算機(jī)工程與應(yīng)用;2011年33期

相關(guān)碩士學(xué)位論文 前1條

1 潘宏亮;浮點(diǎn)指數(shù)類超越函數(shù)的運(yùn)算算法研究與硬件實(shí)現(xiàn)[D];西北工業(yè)大學(xué);2006年

，

本文編號(hào)：2459837