高速通信接口的設計與實現(xiàn)
發(fā)布時間:2019-02-19 20:27
【摘要】:隨著網(wǎng)絡通信和計算機科學技術的迅猛發(fā)展,在各個信息科學領域對于I/O總線的性能要求也越來越高,傳統(tǒng)的I/O總線已逐漸滿足不了現(xiàn)有的需求,于是PCI Express作為第三代I/O互連總線的代表受到了廣泛的關注,它兼?zhèn)淞烁咝阅、高擴展性、高可靠性以及低成本等特點,廣泛應用于移動通訊、航天航空、工業(yè)自動化控制等領域。 本文首先介紹了I/O總線的發(fā)展歷程以及國內外研究現(xiàn)狀,,并著重提出了PCIExpress總線的技術優(yōu)勢,然后闡述了PCI Express總線的協(xié)議規(guī)范、拓撲結構、設備層次、事務機制以及錯誤處理方式,并以此為理論基礎經(jīng)過論證比較提出了基于FPGA的PCI Express接口設計方案,從模塊設計、功能仿真、邏輯優(yōu)化、驅動開發(fā)和應用程序開發(fā)五個方面做了詳細的介紹,最后對系統(tǒng)的單次讀寫、DMA讀寫、DMA讀寫速度進行了完整的測試和驗證,結果表明所設計的PCIExpress接口達到了設計要求,兼?zhèn)淞溯^高的性能和速度。
[Abstract]:With the rapid development of network communication and computer science and technology, the performance requirements of I / O bus are becoming higher and higher in all fields of information science. The traditional I / O bus has been unable to meet the existing needs. Therefore, PCI Express, as the representative of the third generation I / O interconnection bus, has received extensive attention. It has the characteristics of high performance, high expansibility, high reliability and low cost, so it is widely used in mobile communication, aerospace, and so on. Industrial automation control and other fields. This paper first introduces the development of I / O bus and the current research situation at home and abroad, and puts forward the technical advantages of PCIExpress bus, and then expounds the protocol specification, topology structure, device level of PCI Express bus. The transaction mechanism and error handling method are discussed and compared with each other on the basis of theory. The design scheme of PCI Express interface based on FPGA is put forward, which includes module design, function simulation, logic optimization, and so on. Five aspects of driver development and application development are introduced in detail. Finally, the system single read and write, DMA read and write speed are tested and verified. The results show that the designed PCIExpress interface meets the design requirements. It also has high performance and speed.
【學位授予單位】:西安電子科技大學
【學位級別】:碩士
【學位授予年份】:2013
【分類號】:TP336
本文編號:2426847
[Abstract]:With the rapid development of network communication and computer science and technology, the performance requirements of I / O bus are becoming higher and higher in all fields of information science. The traditional I / O bus has been unable to meet the existing needs. Therefore, PCI Express, as the representative of the third generation I / O interconnection bus, has received extensive attention. It has the characteristics of high performance, high expansibility, high reliability and low cost, so it is widely used in mobile communication, aerospace, and so on. Industrial automation control and other fields. This paper first introduces the development of I / O bus and the current research situation at home and abroad, and puts forward the technical advantages of PCIExpress bus, and then expounds the protocol specification, topology structure, device level of PCI Express bus. The transaction mechanism and error handling method are discussed and compared with each other on the basis of theory. The design scheme of PCI Express interface based on FPGA is put forward, which includes module design, function simulation, logic optimization, and so on. Five aspects of driver development and application development are introduced in detail. Finally, the system single read and write, DMA read and write speed are tested and verified. The results show that the designed PCIExpress interface meets the design requirements. It also has high performance and speed.
【學位授予單位】:西安電子科技大學
【學位級別】:碩士
【學位授予年份】:2013
【分類號】:TP336
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本文編號:2426847
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