【摘要】：Nand Flash是目前消費(fèi)性電子產(chǎn)品中被廣泛使用的元件之一。由于Nand Flash的物理機(jī)構(gòu)特點(diǎn)，容易發(fā)生錯(cuò)誤，如何保證數(shù)據(jù)的可靠性，成為一項(xiàng)重要的研究課題。采用糾錯(cuò)碼(Error Correction Coding,ECC)的糾錯(cuò)控制技術(shù)是目前提高閃存數(shù)據(jù)可靠性的關(guān)鍵技術(shù)之一，而BCH碼和低密度校驗(yàn)碼LDPC碼(Low-DensityParity-Check codes)是目前被廣泛應(yīng)用在閃存上的糾錯(cuò)碼。 本文對(duì)BCH碼和LDPC碼在Nand Flash上的編譯碼技術(shù)進(jìn)行了研究，對(duì)未來高性能糾錯(cuò)碼碼糾錯(cuò)芯片有著重要的意義。本文的主要工作概括為： 1.概述了Nand Flash基本結(jié)構(gòu)和傳統(tǒng)的閃存存儲(chǔ)技術(shù)，詳細(xì)分析了NandFlash錯(cuò)誤機(jī)制和錯(cuò)誤衡量標(biāo)準(zhǔn)，并闡述了閃存的基本糾錯(cuò)機(jī)制。 2.深入研究了BCH編譯碼思想和構(gòu)造方法，探討了閃存電壓概率分布，，將閃存電壓狀態(tài)作為BCH硬判決算法輸入信息進(jìn)行譯碼，用BCH譯碼算法改善閃存數(shù)據(jù)可靠性問題，并通過仿真分析了BCH碼對(duì)Nand Flash可靠性的改進(jìn)。 3.深入研究了LDPC碼軟判決最小和譯碼算法，該算法可以有效地利用閃存LLR信息來提高閃存系統(tǒng)的譯碼性能，通過仿真表明該算法有效的提高了閃速存儲(chǔ)系統(tǒng)數(shù)據(jù)的可靠性，同時(shí)由于該算法的復(fù)雜度相對(duì)較小，對(duì)Nand Flash的讀寫速度也有一定程度的提高。
[Abstract]:Nand Flash is one of the widely used components in consumer electronics. Due to the characteristics of physical mechanism of Nand Flash, it is easy to make mistakes, so how to ensure the reliability of data becomes an important research topic. Error-correcting control technology using error-correcting code (Error Correction coding is one of the key technologies to improve the reliability of flash data, while BCH code and low-density check code (Low-DensityParity-Check codes) are widely used in flash memory. In this paper, the encoding and decoding techniques of BCH code and LDPC code on Nand Flash are studied, which is of great significance to the future high performance error-correcting code chip. The main work of this paper is summarized as follows: 1. This paper summarizes the basic structure of Nand Flash and traditional flash memory technology, analyzes the error mechanism and error measurement standard of NandFlash in detail, and expounds the basic error-correcting mechanism of flash memory. 2. In this paper, the idea and construction method of BCH encoding and decoding are deeply studied, and the probability distribution of flash voltage is discussed. The state of flash voltage is used as input information of BCH hard decision algorithm to decode, and BCH decoding algorithm is used to improve the reliability of flash memory data. The improvement of Nand Flash reliability by BCH code is analyzed by simulation. 3. The soft-decision minimum sum decoding algorithm for LDPC codes is studied in depth. The algorithm can effectively use flash memory LLR information to improve the decoding performance of flash memory system. The simulation results show that the algorithm can effectively improve the reliability of flash storage system data. At the same time, because the complexity of the algorithm is relatively small, the speed of reading and writing of Nand Flash is improved to a certain extent.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2013
【分類號(hào)】：TP333;TN911.22

【參考文獻(xiàn)】

相關(guān)期刊論文 前3條

1 黃繼寬;;固態(tài)硬盤掀起儲(chǔ)存媒體的革命浪潮[J];電子與電腦;2007年07期

2 孔令軍;趙瑩;肖揚(yáng);;準(zhǔn)循環(huán)LDPC碼不存在四環(huán)的充要條件[J];鐵道學(xué)報(bào);2009年06期

3 肖揚(yáng);徐丹;;準(zhǔn)循環(huán)LDPC好碼設(shè)計(jì)[J];系統(tǒng)工程與電子技術(shù);2009年05期

相關(guān)碩士學(xué)位論文 前2條

1 林偉瓊;基于QC-LDPC編碼的MIMO-OFDM系統(tǒng)性能研究[D];廈門大學(xué);2007年

2 龔瑩瑩;基于DTMB標(biāo)準(zhǔn)的QC-LDPC編譯碼的算法研究與實(shí)現(xiàn)[D];武漢理工大學(xué);2008年

本文編號(hào)：2146195