本文選題：數(shù)據(jù)存儲 + SATA��； 參考：《電子科技大學》2012年碩士論文

【摘要】：隨著現(xiàn)代信息產業(yè)的飛速發(fā)展,在各種軍用、民用和工業(yè)領域中,需要對不同場合下處理的數(shù)據(jù)進行記錄或暫存,為后期進一步的觀察和分析提供條件。應用領域的不斷發(fā)展,伴隨著數(shù)據(jù)量不斷增大和數(shù)據(jù)率的不斷加快,對存儲系統(tǒng)提出了新的要求,例如便攜,脫機,長時間、大容量的高效存儲等,而這些嚴格的條件也促使著存儲技術的不斷向前發(fā)展。 根據(jù)現(xiàn)有需求,本文以數(shù)據(jù)存儲系統(tǒng)為研究對象,討論了存儲技術的發(fā)展前景和研究現(xiàn)狀,對SATA協(xié)議理論體系的原理進行了詳細分析,設計出了一種基于FPGA的硬盤訪問控制方案,通過編寫SATA協(xié)議的狀態(tài)機邏輯,搭建有FPGA與SATA接口硬盤的硬件電路測試平臺,對軟件和硬件進行調試后,最終驗證了該存儲方案的可行性。 本文的主要工作如下： 1.全面并詳細的闡述了SATA協(xié)議數(shù)據(jù)傳輸?shù)脑?并從實現(xiàn)條件,數(shù)據(jù)結構,編碼方式等方面,分析數(shù)據(jù)在每一個協(xié)議層中傳輸?shù)倪^程,以及繼承PATA協(xié)議的依據(jù)。 2.采用了基于FPGA的數(shù)據(jù)流控制方案,分別對各個子模塊的功能和實現(xiàn)原理進行了詳細的介紹。 3.設計并實現(xiàn)了FPGA內部的狀態(tài)機邏輯,以狀態(tài)轉移圖和文字的方式描述了各子協(xié)議層工作的過程。 4.完成了印制電路板的設計和制作,詳細的闡述了設計中布局布線的依據(jù),并進行了后期的系統(tǒng)調試。
[Abstract]:With the rapid development of modern information industry, in various military, civil and industrial fields, it is necessary to record or temporarily store the data processed in different situations, which provides conditions for further observation and analysis. With the continuous development of application field, with the increasing of data volume and data rate, new requirements for storage system are put forward, such as portable, offline, long time, high efficiency storage with large capacity, etc. These strict conditions also promote the continuous development of storage technology. According to the existing requirements, this paper takes the data storage system as the research object, discusses the development prospect and research status of the storage technology, and analyzes the principle of the SATA protocol theory system in detail. A hardware access control scheme based on FPGA is designed. By writing the state machine logic of SATA protocol, the hardware circuit test platform with the interface between FPGA and SATA is built, and the software and hardware are debugged. Finally, the feasibility of the storage scheme is verified. The main work of this paper is as follows: 1. The principle of data transmission in SATA protocol is expounded in detail, and the process of data transmission in each protocol layer and the basis of inheriting PATA protocol are analyzed from the aspects of realization condition, data structure, coding method and so on. 2. The data flow control scheme based on FPGA is adopted, and the function and realization principle of each sub-module are introduced in detail. 3. The state machine logic in FPGA is designed and implemented, and the working process of each sub-protocol layer is described by state transition diagram and text. 4. The design and manufacture of printed circuit board are completed, the basis of layout and wiring in the design is expounded in detail, and the system debugging is carried out in the later stage.
【學位授予單位】：電子科技大學
【學位級別】：碩士
【學位授予年份】：2012
【分類號】：TP333.35;TN791

【參考文獻】

相關期刊論文 前6條

1 李宥謀;;8B/10B編碼器的設計及實現(xiàn)[J];電訊技術;2005年06期

2 康瓊;許月圓;劉書明;;Rocket I/O GTP收發(fā)器的外圍硬件設計[J];航空兵器;2009年02期

3 鄒德財;吳海濤;李云;;XILINX的FPGA芯片架構剖析[J];航空計算技術;2007年02期

4 歐陽科文;黎福海;唐純杰;;基于RocketIO的SATA物理層高速串行傳輸實現(xiàn)[J];計算機測量與控制;2009年05期

5 伍方輝;方安安;;CRC的FPGA設計與實現(xiàn)[J];中國新通信;2008年13期

6 胡錦;彭成;譚明;;基于RocketIO的高速串行協(xié)議設計與實現(xiàn)[J];微計算機信息;2008年18期

，

本文編號：2026417