本文選題：嵌入式系統(tǒng) + 鎖存器電路�。� 參考：《計(jì)算機(jī)仿真》2017年08期

【摘要】：對(duì)嵌入式系統(tǒng)中鎖存器電路進(jìn)行節(jié)能設(shè)計(jì),能夠有效提升系統(tǒng)的穩(wěn)定性。對(duì)鎖存器電路的節(jié)能設(shè)計(jì)時(shí),由于系統(tǒng)需要調(diào)整空閑時(shí)間,導(dǎo)致得到的系統(tǒng)最小能耗值不準(zhǔn)確。傳統(tǒng)方法將鎖存器電路狀態(tài)差異度作為適應(yīng)度函數(shù),約束系統(tǒng)最小能耗值的波動(dòng),但迭代次數(shù)過多,導(dǎo)致節(jié)能效果不理想。提出基于禁忌策略的嵌入式系統(tǒng)中鎖存器電路節(jié)能設(shè)計(jì)模型。組建嵌入式系統(tǒng)鎖存器電路動(dòng)態(tài)能耗模型,給出嵌入式系統(tǒng)運(yùn)行周期內(nèi)電路開關(guān)電容、電源電壓以及頻率之間的關(guān)系,得到電路電壓轉(zhuǎn)換消耗的轉(zhuǎn)換能量,建立鎖存器電路電壓調(diào)度任務(wù)的優(yōu)先序列,利用禁忌搜索策略通過調(diào)整已有調(diào)度增加任務(wù)的空閑時(shí)間,得到嵌入式電路系統(tǒng)最小能耗值,組建嵌入式系統(tǒng)中鎖存器電路節(jié)能設(shè)計(jì)模型。仿真結(jié)果表明,所提模型設(shè)計(jì)的鎖存器電路具有較好的瞬態(tài)特性和更低的功耗。
[Abstract]:The energy-saving design of latch circuit in embedded system can effectively improve the stability of the system. In the energy saving design of latch circuit, the minimum energy consumption is not accurate because the system needs to adjust the idle time. The traditional method regards the state difference of the latch circuit as the fitness function, constrains the fluctuation of the minimum energy consumption of the system, but the number of iterations is too many, resulting in the energy saving effect is not ideal. This paper presents an energy saving design model of latch circuit in embedded system based on Tabu strategy. The dynamic energy consumption model of latch circuit in embedded system is established. The relationship among circuit switching capacitance, power supply voltage and frequency during the running period of embedded system is given, and the conversion energy consumed by circuit voltage conversion is obtained. The priority sequence of voltage scheduling tasks in latch circuits is established and the minimum energy consumption of embedded circuit system is obtained by adjusting the idle time of the existing scheduling by using Tabu search strategy. The energy saving design model of latch circuit in embedded system is established. The simulation results show that the latch circuit designed by the proposed model has better transient characteristics and lower power consumption.
【作者單位】： 北華大學(xué)計(jì)算機(jī)科學(xué)技術(shù)學(xué)院;
【基金】：吉林市科技計(jì)劃項(xiàng)目(2015334003) 吉林省科技發(fā)展計(jì)劃項(xiàng)目(20150441003SC)
【分類號(hào)】：TP368.1

【相似文獻(xiàn)】

相關(guān)期刊論文 前10條

1 彭毅;;Z80-CPU限界運(yùn)行硬件[J];微型機(jī)與應(yīng)用;1985年01期

2 潘文誠;用一片8D鎖存器實(shí)現(xiàn)的單片機(jī)鍵顯接口電路[J];電測(cè)與儀表;2003年09期

3 劉嘉勇;鄭光洲;;MCS-51單片機(jī)10位、12位D/A轉(zhuǎn)換接口設(shè)計(jì)技巧[J];電子技術(shù);1992年04期

4 謝華燕;潘麗;;單片機(jī)系統(tǒng)與控制中鎖存器的應(yīng)用[J];甘肅高師學(xué)報(bào);2014年02期

5 ;存儲(chǔ)器、鎖存器[J];電子科技文摘;2003年03期

6 ;存儲(chǔ)器、鎖存器[J];電子科技文摘;2003年07期

7 ;存儲(chǔ)器、鎖存器[J];電子科技文摘;2006年02期

8 ;存儲(chǔ)器、鎖存器[J];電子科技文摘;2000年09期

9 章琪;李斌;;CAM的設(shè)計(jì)與應(yīng)用研究[J];沈陽理工大學(xué)學(xué)報(bào);2011年03期

10 ;存儲(chǔ)器、鎖存器[J];電子科技文摘;2006年03期

，

本文編號(hào)：1881495