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基于FPGA的SATA3.0硬盤(pán)陣列控制器設(shè)計(jì)

發(fā)布時(shí)間:2018-04-22 09:39

  本文選題:SATA3.0 + 協(xié)議 ; 參考:《河北大學(xué)》2017年碩士論文


【摘要】:隨著航天技術(shù)的不斷發(fā)展,衛(wèi)星通信技術(shù)日益成熟,能夠?qū)崿F(xiàn)空對(duì)地的大容量、高速率的數(shù)據(jù)傳輸。雖然在現(xiàn)代通信中,高速數(shù)據(jù)的傳輸技術(shù)發(fā)展十分迅速,但是高速數(shù)據(jù)存儲(chǔ)技術(shù)的瓶頸依然很難突破。導(dǎo)致高速采集的數(shù)據(jù)不能及時(shí)有效存儲(chǔ)。在我國(guó)天地一體化網(wǎng)絡(luò)的背景下,越來(lái)越多的衛(wèi)星、空間站等復(fù)雜航天器要對(duì)地面高速傳輸大量數(shù)據(jù),要求地面在有限的時(shí)間內(nèi)將數(shù)據(jù)存儲(chǔ)以便于后期處理。尤其是在非同步衛(wèi)星過(guò)頂時(shí)間短的情況下,衛(wèi)星數(shù)據(jù)傳回速度可達(dá)10Gbps,而現(xiàn)在計(jì)算機(jī)存儲(chǔ)速度遠(yuǎn)遠(yuǎn)跟不上數(shù)據(jù)的傳輸速度。因此研究一種能夠?qū)⒑A繑?shù)據(jù)實(shí)時(shí)的高速存儲(chǔ)并便于攜帶的設(shè)備具有重要意義。國(guó)內(nèi)的硬盤(pán)存儲(chǔ)技術(shù)起步較晚,市面上較常見(jiàn)基于SATA2.0協(xié)議的硬盤(pán)控制器,2009年Serial ATA委員會(huì)提出了傳輸速度可達(dá)到600MB/s的第3代SATA協(xié)議標(biāo)準(zhǔn)后,SATA3.0接口的硬盤(pán)控制器一直處于研究發(fā)展的過(guò)程中。本文以SATA3.0接口硬盤(pán)作為存儲(chǔ)載體,以兩塊硬盤(pán)通過(guò)按位分配構(gòu)成RAID0陣列,以FPGA邏輯控制實(shí)現(xiàn)硬盤(pán)控制器直接進(jìn)行硬盤(pán)數(shù)據(jù)讀寫(xiě),包括以邏輯控制實(shí)現(xiàn)協(xié)議應(yīng)用層讀寫(xiě),從而能夠避開(kāi)操作系統(tǒng)的介入,實(shí)現(xiàn)數(shù)據(jù)的高速讀寫(xiě)。文中首先對(duì)SATA3.0協(xié)議的物理層、鏈路層、傳輸層、應(yīng)用層進(jìn)行了結(jié)構(gòu)和功能分析,介紹了RAID0陣列實(shí)現(xiàn)原理和方法并給出了硬盤(pán)陣列控制器的整體設(shè)計(jì)方案。其次,利用Verilog語(yǔ)言對(duì)SATA3.0硬盤(pán)控制器進(jìn)行了詳細(xì)的設(shè)計(jì)以及功能仿真,最后通過(guò)數(shù)據(jù)分配單元實(shí)現(xiàn)RAID0硬盤(pán)陣列并對(duì)數(shù)據(jù)分配單元進(jìn)行數(shù)據(jù)讀寫(xiě)仿真。通過(guò)仿真測(cè)試,驗(yàn)證了設(shè)計(jì)的正確性,實(shí)現(xiàn)了在150MHz時(shí)鐘下的單塊硬盤(pán)600MB/s,兩塊SATA3.0硬盤(pán)組成的RAID0陣列1.2GB/s的讀寫(xiě)速度。
[Abstract]:With the development of space technology, satellite communication technology is becoming more and more mature, which can realize large capacity and high speed data transmission. Although high-speed data transmission technology is developing rapidly in modern communication, the bottleneck of high-speed data storage technology is still difficult to break through. As a result, the data collected at high speed can not be stored in time and effectively. Under the background of China's integrated network of space and earth, more and more complex spacecraft, such as satellites and space stations, have to transmit a large amount of data to the ground at high speed, which requires that the data be stored on the ground in a limited time to facilitate post-processing. Especially in the case of the short time of passing through the top of the non-synchronous satellite, the return speed of the satellite data can reach 10Gbps.However, the speed of the computer storage is far from keeping up with the transmission speed of the data. Therefore, it is of great significance to study a high-speed storage and portable device that can store large amounts of data in real time. The hard disk storage technology in China started relatively late. The hard disk controller based on SATA2.0 protocol is more common in the market. In 2009, the Serial ATA Committee proposed that the hard disk controller with SATA3.0 interface can meet the standard of the 3rd generation SATA protocol of 600MB/s, and the hard disk controller with SATA3.0 interface has been in the process of research and development. In this paper, SATA3.0 interface hard disk is used as storage carrier, two hard disks are allocated by bit to form RAID0 array, and FPGA logic control is used to realize hard disk data reading and writing directly, including realization of protocol application layer reading and writing by logic control. Thus, it can avoid the intervention of operating system and realize high speed reading and writing of data. In this paper, the structure and function of physical layer, link layer, transmission layer and application layer of SATA3.0 protocol are analyzed, the principle and method of RAID0 array implementation are introduced, and the overall design scheme of hard disk array controller is given. Secondly, the SATA3.0 hard disk controller is designed and simulated in detail by using Verilog language. Finally, the RAID0 hard disk array is realized by the data allocation unit and the data reading and writing simulation of the data allocation unit is carried out. Through the simulation test, the correctness of the design is verified, and the reading and writing speed of the RAID0 array 1.2GB/s composed of 600m / s single hard disk and two SATA3.0 hard disks under the 150MHz clock is realized.
【學(xué)位授予單位】:河北大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2017
【分類(lèi)號(hào)】:TP333.35

【參考文獻(xiàn)】

相關(guān)期刊論文 前10條

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2 王麗娟;李錦明;杜東海;;基于FPGA的SFP光纖通信控制器的研究與設(shè)計(jì)[J];電子器件;2016年03期

3 張慶順;劉贊;郭寶增;張鎖良;;基于FPGA的SATA主機(jī)端控制器鏈路層發(fā)送模塊設(shè)計(jì)[J];河北大學(xué)學(xué)報(bào)(自然科學(xué)版);2016年02期

4 張s,

本文編號(hào):1786670


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