本文選題：NAND閃存　切入點：NOR　出處：《蘇州大學(xué)》2013年碩士論文

【摘要】：閃存（Flash Memory）是一種長壽命的非易失性（在斷電情況下仍能保持所存儲的數(shù)據(jù)信息）的存儲器。由于其斷電后仍能保存數(shù)據(jù)，閃存通常被用來保存設(shè)置信息，如在電腦的BIOS（基本輸入輸出程序）、PDA（個人數(shù)字助理）、數(shù)碼相機(jī)中保存資料等。閃存分為NOR型與NAND型，目前NAND閃存是一種比硬盤驅(qū)動器更好的存儲方案，這在不超過8GB的低容量應(yīng)用中表現(xiàn)的猶為明顯。隨著人們持續(xù)追求功耗更低、重量更輕和性能更佳的產(chǎn)品，NAND閃存正被證明極具吸引力。 NAND閃存作為一種比較實用的固態(tài)硬盤存儲介質(zhì)，有自己的一些物理特性，NAND閃存的電荷非常不穩(wěn)定，在寫入（編程）時很容易對鄰近的單元造成干擾，，干擾后會讓附近單元的電荷脫離實際的邏輯數(shù)值，造成位（bit）出錯。由于閾值電壓接近的關(guān)系，MLC相對SLC來說更容易受到干擾，如何改善寫入（編程）干擾是本文研究的主要方向。 寫入（編程）干擾指的是，某個頁(page)在寫入（編程）時，鄰近位（bit）的電壓也被升高了，造成位（bit）出錯。為了保證寫入數(shù)據(jù)的完整性,研究如何減少寫入（編程）干擾造成的數(shù)據(jù)出錯顯得尤為重要，除了芯片級測試參數(shù)的修改與寫入（編程）的方法可以改善寫入（編程）干擾，在系統(tǒng)級測試中，通過ECC算法也可以糾正這些位（bit）的錯誤。隨著NAND閃存工藝的不斷提升，同樣大小的晶片上被封裝入更多的單元，造成干擾越來越厲害，所以需要更強(qiáng)大的ECC來糾正位（bit）。 本文重點研究了NAND閃存寫入（編程）干擾的原理，由淺入深的介紹了NAND閃存寫入（編程）干擾的特性與種類以及各自的改善方法，并結(jié)合NAND閃存實際測試過程中遇到的寫入（編程）干擾問題，對NAND閃存寫入（編程）干擾提出了合理的改善意見與建議。
[Abstract]:Flash memory (Flash memory) is a kind of memory with long life and non-volatile (the stored data information can be maintained in the case of power failure).Because it can save data after power off, flash memory is usually used to save setup information, such as PDAs (personal digital assistant, digital camera) and so on.Flash memory is divided into NOR type and NAND type. At present, NAND flash memory is a better storage scheme than hard disk drive.As people continue to pursue lower power, lighter and better performance products, NAND flash memory is proving to be extremely attractive.As a practical solid state hard disk storage medium, NAND flash memory has its own physical characteristics. The charge of NAND flash memory is very unstable, and it is easy to interfere with adjacent units when writing (programming).The interference causes the charge of the nearby cell to deviate from the actual logical value, resulting in bit error.Because of the close threshold voltage, MLC is more susceptible to interference than SLC. How to improve write (programming) interference is the main research direction of this paper.Write (programming) interference means that when a page pageis written, the voltage of the adjacent bit is also raised, causing bit error.In order to ensure the integrity of writing data, it is very important to study how to reduce the data error caused by write (programming) interference, except that the modification of test parameters at chip level and the method of writing (programming) can improve write (programming) interference.In system-level testing, these bit-bit errors can also be corrected by the ECC algorithm.As the NAND flash memory process continues to improve, the same size of the chip is encapsulated in more units, causing more and more interference, so a stronger ECC is needed to correct the bitbit.This paper focuses on the principle of NAND flash write (programming) interference, introduces the characteristics and types of NAND flash memory write (programming) interference and their respective improvement methods.Combining with the problem of write (programming) interference encountered in the process of NAND flash memory testing, the paper puts forward some reasonable suggestions for improving the write (programming) interference of NAND flash memory.
【學(xué)位授予單位】：蘇州大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2013
【分類號】：TP333

【參考文獻(xiàn)】

相關(guān)期刊論文 前2條

1 李力;閃速存儲器技術(shù)現(xiàn)狀及發(fā)展趨勢[J];單片機(jī)與嵌入式系統(tǒng)應(yīng)用;2001年08期

2 潘立陽,朱鈞;Flash存儲器技術(shù)與發(fā)展[J];微電子學(xué);2002年01期

本文編號：1725471