本文選題：NorFlash控制器　切入點：FPGA　出處：《西安電子科技大學》2013年碩士論文

【摘要】：NorFlash存儲器憑借其可靠性高、讀取速度快和片內(nèi)執(zhí)行能力等優(yōu)點，廣泛地運用于智能手機和嵌入式系統(tǒng)等的程序代碼存儲中。因此，研究NorFlash的存儲原理、內(nèi)部結(jié)構(gòu)以及如何可靠快速讀取NorFlash存儲的數(shù)據(jù)具有重要意義，而設(shè)計一款匹配NorFlash的控制器將會有良好的應(yīng)用前景。 論文在研究了NorFlash存儲器技術(shù)規(guī)范文檔和FPGA設(shè)計方法與技巧的基礎(chǔ)上，通過分析NorFlash的控制操作和工作流程，設(shè)計出NorFlash控制器的整體構(gòu)架，采用自頂向下的設(shè)計方法和層次化設(shè)計思想，，將NorFlash控制器劃分為若干個模塊，并使用VHDL硬件描述語言完成了I/O接口模塊、命令控制模塊和時序控制模塊的RTL級設(shè)計。在Xilinx公司的ISE集成軟件環(huán)境下，搭建NorFlash控制器仿真平臺，利用ModelSim仿真軟件和Spansion提供的NorFlash器件模型進行了功能仿真。編寫可綜合的VHDL測試程序，搭建控制器驗證平臺，完成了控制器在FPGA開發(fā)板上的硬件驗證。從FPGA開發(fā)板硬件驗證結(jié)果來看，控制器在電路功能和時序方面滿足了設(shè)計的要求。整個NorFlash控制器模塊劃分和驗證平臺的搭建合理可行，具有很好的兼容性和可操作性。 本論文完整地論述了NorFlash控制器的設(shè)計原理、具體的設(shè)計過程以及測試驗證該設(shè)計的方法。設(shè)計的控制器實現(xiàn)了端口控制操作簡單，符合CFI接口標準的NorFlash存儲器通用控制，具有實用性強和適用范圍廣的特點。
[Abstract]:NorFlash memory is widely used in the program code storage of smart phone and embedded system because of its high reliability, fast reading speed and on-chip execution ability. Therefore, the storage principle of NorFlash is studied. The internal structure and how to read the data stored in NorFlash reliably and quickly are of great significance, and the design of a controller matching NorFlash will have a good application prospect. Based on the research of NorFlash memory specification document and FPGA design method and technique, the whole frame of NorFlash controller is designed by analyzing the control operation and workflow of NorFlash. Using top-down design method and hierarchical design idea, the NorFlash controller is divided into several modules, and I / O interface module is completed by using VHDL hardware description language. The RTL level design of command control module and timing control module. Under the ISE integrated software environment of Xilinx Company, the simulation platform of NorFlash controller is built. The functional simulation is carried out by using ModelSim simulation software and NorFlash device model provided by Spansion. A comprehensive VHDL test program is written and a controller verification platform is built. The hardware verification of the controller on the FPGA development board is completed. From the result of the hardware verification of the FPGA development board, the controller meets the design requirements in the aspects of circuit function and timing. The module partition of the whole NorFlash controller and the construction of the verification platform are reasonable and feasible. Good compatibility and maneuverability. In this paper, the design principle of NorFlash controller, the concrete design process and the method of testing and verifying the design are discussed. The controller realizes the universal control of NorFlash memory, which is simple in port control operation and accords with the standard of CFI interface. The utility model has the characteristics of strong practicability and wide application range.
【學位授予單位】：西安電子科技大學
【學位級別】：碩士
【學位授予年份】：2013
【分類號】：TP333;TN791

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本文編號：1653585