阻變存儲(chǔ)器電路設(shè)計(jì)
發(fā)布時(shí)間:2018-01-29 17:15
本文關(guān)鍵詞: 阻變存儲(chǔ)器 阻變器件模型 存儲(chǔ)陣列 讀寫方案 讀寫電路設(shè)計(jì) 出處:《西安電子科技大學(xué)》2012年碩士論文 論文類型:學(xué)位論文
【摘要】:隨著集成電路與半導(dǎo)體加工工藝的不斷進(jìn)步,現(xiàn)有的存儲(chǔ)器越來(lái)越難以滿足電子產(chǎn)品的需求。作為一種新型非易失存儲(chǔ)器,阻變存儲(chǔ)器以其優(yōu)越的性能得到了業(yè)界的廣泛認(rèn)可。 本文首先研究了RRAM器件的基礎(chǔ)理論。根據(jù)RRAM器件的物理特性,采用兩種方法對(duì)RRAM器件進(jìn)行行為建模。其中基于Verilog-A語(yǔ)言的RRAM器件模型成功應(yīng)用到后續(xù)RRAM存儲(chǔ)器電路的仿真驗(yàn)證中。其次,本文開展了RRAM器件集成技術(shù)研究。設(shè)計(jì)了基于1R型結(jié)構(gòu)的RRAM存儲(chǔ)陣列及其讀寫方案,理論計(jì)算和仿真驗(yàn)證表明,所設(shè)計(jì)的讀寫方案能夠滿足設(shè)計(jì)要求。最后,在RRAM器件模型和讀寫方案的基礎(chǔ)上,本文基于1.8伏SMIC0.18μm CMOS工藝,,設(shè)計(jì)了一個(gè)存儲(chǔ)容量為16×32bit的RRAM存儲(chǔ)陣列及外圍讀寫電路(包括譯碼器,靈敏放大器,電平選擇電路,存儲(chǔ)陣列,控制電路等),利用Cadence工具對(duì)RRAM存儲(chǔ)器電路進(jìn)行了仿真驗(yàn)證。仿真結(jié)果表明,RRAM存儲(chǔ)器工作正常并能實(shí)現(xiàn)數(shù)據(jù)的準(zhǔn)確讀寫,不存在誤讀和誤寫現(xiàn)象。
[Abstract]:With the development of integrated circuit and semiconductor processing technology, the existing memory is more and more difficult to meet the needs of electronic products. As a new type of non-volatile memory. Resistive memory has been widely recognized by the industry for its superior performance. In this paper, the basic theory of RRAM devices is studied firstly. According to the physical characteristics of RRAM devices. Two methods are used to model the behavior of RRAM devices. The RRAM device model based on Verilog-A language is successfully applied to the simulation of subsequent RRAM memory circuits. Secondly. In this paper, the integrated technology of RRAM devices is studied. The RRAM memory array based on 1R structure and its reading and writing scheme are designed. The theoretical calculation and simulation results show that. The designed reading and writing scheme can meet the design requirements. Finally, based on the RRAM device model and read and write scheme, this paper based on 1.8 V SMIC0.18 渭 m CMOS process. A 16 脳 32bit RRAM memory array and peripheral read-write circuits (including decoder, sensitive amplifier, level selection circuit, memory array, control circuit, etc.) are designed. The simulation results show that the RRAM memory works well and can read and write the data accurately without misreading and miswriting.
【學(xué)位授予單位】:西安電子科技大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2012
【分類號(hào)】:TP333
【參考文獻(xiàn)】
相關(guān)期刊論文 前1條
1 ;Progress in rectifying-based RRAM passive crossbar array[J];Science China(Technological Sciences);2011年04期
本文編號(hào):1473921
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