本文關(guān)鍵詞：基于VxWorks的可視化并行性能剖析器的設(shè)計(jì)與實(shí)現(xiàn)　出處：《中國(guó)艦船研究院》2012年碩士論文　論文類(lèi)型：學(xué)位論文

  更多相關(guān)文章： 并行程序 性能剖析 可視化 VxWorks

【摘要】：隨著高性能并行計(jì)算的飛速發(fā)展和在軍用、工業(yè)技術(shù)等領(lǐng)域的廣泛應(yīng)用，越來(lái)越多的用戶開(kāi)始應(yīng)用并行處理技術(shù)解決問(wèn)題，，針對(duì)嵌入式多核多處理器平臺(tái)的并行程序開(kāi)發(fā)也更加普及。并行調(diào)試技術(shù)是并行程序開(kāi)發(fā)過(guò)程中的一個(gè)重要環(huán)節(jié)，調(diào)試并行實(shí)時(shí)應(yīng)用程序的過(guò)程十分復(fù)雜，但是并行調(diào)試環(huán)境卻相對(duì)比較薄弱。并行程序性能分析已經(jīng)成為并行程序調(diào)試、并行算法研究的一種重要輔助手段，通過(guò)性能分析工具，開(kāi)發(fā)人員可以更容易地了解程序行為、發(fā)現(xiàn)性能瓶頸、給出優(yōu)化方案。 本文首先介紹并行計(jì)算的相關(guān)背景知識(shí)，分析了并行調(diào)試中幾個(gè)常見(jiàn)的問(wèn)題，包括并行程序執(zhí)行過(guò)程中的不確定性和并行調(diào)試器的可移植性等，然后分別介紹了并行正確性調(diào)試和并行性能調(diào)試的概念和基本原理，并對(duì)目前主流的并行調(diào)試器進(jìn)行了分析和比較。本文的主要研究工作包括以下三個(gè)方面： 1)在基于事件模型的并行程序性能分析技術(shù)的基礎(chǔ)上，針對(duì)PowerPC處理器構(gòu)成的并行嵌入式系統(tǒng)，設(shè)計(jì)和實(shí)現(xiàn)了一個(gè)基于VxWorks的并行程序性能監(jiān)測(cè)函數(shù)庫(kù)TF_Trace，能夠完成程序性能數(shù)據(jù)的產(chǎn)生和采集。 2)根據(jù)并行程序執(zhí)行特性，建立并行程序圖形化抽象，設(shè)計(jì)和實(shí)現(xiàn)了一個(gè)可視化性能分析工具TATL，能通過(guò)形象、直觀、易于理解的圖形來(lái)對(duì)性能數(shù)據(jù)進(jìn)行性能剖析，從而重放出并行程序進(jìn)程間的行為。 3)設(shè)計(jì)了一個(gè)并行Mandelbrot Set畫(huà)圖程序，對(duì)性能分析函數(shù)庫(kù)和可視化性能分析工具進(jìn)行了可用性測(cè)試和功能驗(yàn)證，結(jié)果證明該工具占用系統(tǒng)資源少，性能較高，能精確測(cè)量多處理器事件時(shí)間，分析效果較好。
[Abstract]:With the rapid development of high-performance parallel computing and its wide application in military, industrial technology and other fields, more and more users begin to use parallel processing technology to solve problems. Parallel debugging technology is an important part of parallel program development, and the process of debugging parallel real-time applications is very complex. But the parallel debugging environment is relatively weak. Parallel program performance analysis has become an important means of parallel program debugging, parallel algorithm research, through the performance analysis tool. Developers can more easily understand program behavior, find performance bottlenecks, and give optimization solutions. This paper first introduces the background of parallel computing, and analyzes several common problems in parallel debugging, including the uncertainty in the execution of parallel programs and the portability of parallel debugger. Then, the concepts and basic principles of parallel correctness debugging and parallel performance debugging are introduced, and the current mainstream parallel debugger is analyzed and compared. The main research work of this paper includes the following three aspects:. 1) based on the performance analysis technology of parallel program based on event model, a parallel embedded system based on PowerPC processor is proposed. A parallel program performance monitoring function library based on VxWorks is designed and implemented, which can generate and collect program performance data. 2) according to the characteristics of parallel program execution, the graphical abstraction of parallel program is established, and a visual performance analysis tool, TATL, is designed and implemented, which can be visualized and intuitionistic. Easy-to-understand graphics to analyze the performance of the performance data, thereby re-releasing the parallel program process behavior. 3) A parallel Mandelbrot Set drawing program is designed, and the usability test and function verification of the performance analysis function library and the visual performance analysis tool are carried out. The results show that the tool has the advantages of less system resource, higher performance, accurate measurement of multiprocessor event time, and better analysis effect.
【學(xué)位授予單位】：中國(guó)艦船研究院
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2012
【分類(lèi)號(hào)】：TP338.6

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