本文選題：斬波調(diào)制 + 失調(diào)電壓　； 參考：《微電子學(xué)與計(jì)算機(jī)》2016年12期

【摘要】：采用TSMC 40nm CMOS工藝,設(shè)計(jì)了一種高精度的CMOS帶隙基準(zhǔn)源.首先分析帶隙基準(zhǔn)的誤差,以及誤差的消除手段,然后使用斬波技術(shù)和凹口濾波器(notch filter)消除失調(diào)電壓,以及減少斬波帶來(lái)的紋波影響.最后通過蒙塔卡洛仿真表明該基準(zhǔn)源在使用斬波技術(shù)后3σ精度提高了7.7倍,達(dá)到0.54%.該基準(zhǔn)源在-20~125℃的溫度范圍內(nèi)溫度系數(shù)為14×10-6/℃.
[Abstract]:Using TSMC 40nm CMOS process, a high precision CMOS bandgap reference source is designed.First, the error of bandgap reference and the method of error elimination are analyzed, then the offset voltage is eliminated by chopping technique and notch filter, and the ripple effect caused by chopper is reduced.Finally, the simulation results of Montagaro show that the 3 蟽 accuracy of the reference source is 7.7 times higher than that of the chopping technique, reaching 0.54.The temperature coefficient of the reference source is 14 脳 10 ~ (-6) / 鈩，

本文編號(hào)：1756594