本文選題：智能變電站 + 時(shí)鐘同步　； 參考：《大連理工大學(xué)》2015年碩士論文

【摘要】：近幾年國(guó)家電網(wǎng)大力建設(shè)堅(jiān)強(qiáng)智能電網(wǎng),作為其構(gòu)成基礎(chǔ)的智能變電站的作用也變得越來(lái)越重要。由于智能電網(wǎng)具有分布式的結(jié)構(gòu)特點(diǎn),需要自上而下保持動(dòng)作的一致性和準(zhǔn)確性,因此要求系統(tǒng)內(nèi)的智能變電站以及變電站中的設(shè)備運(yùn)行需要在統(tǒng)一的時(shí)間基準(zhǔn)之下。雖然現(xiàn)有的時(shí)鐘同步技術(shù)很多,但都不能在保證可靠運(yùn)行和節(jié)約成本的前提下提高智能變電站的對(duì)時(shí)精度。IEEE1588精確時(shí)間同步協(xié)議的提出為智能變電站提供了一種全新的時(shí)鐘同步解決方案,依靠站中已存的通信網(wǎng)絡(luò)基礎(chǔ)可使全站實(shí)現(xiàn)亞微秒級(jí)同步精度。論文依據(jù)IEEE1588精確時(shí)間協(xié)議,設(shè)計(jì)了一套基于FPGA+DM9000+DP83640的時(shí)鐘同步系統(tǒng),用于解決智能變電站的同步問(wèn)題。該系統(tǒng)既可以為主時(shí)鐘同步其它從時(shí)鐘,也可以為從時(shí)鐘與主時(shí)鐘同步。論文首先介紹IEEE1588協(xié)議的同步機(jī)制和相關(guān)原理,對(duì)主要的時(shí)鐘同步模型、PTP時(shí)鐘屬性、PTP報(bào)文及數(shù)據(jù)集作了相關(guān)闡述,在此基礎(chǔ)上,確定時(shí)鐘同步系統(tǒng)的整體框架。在硬件部分采用FPGA作為主控芯片完成相關(guān)程序和狀態(tài)機(jī)的維護(hù)；采用DM9000作為以太網(wǎng)控制器；采用DP83640作為物理層芯片使MII接口獨(dú)立,完成時(shí)間戳信息的加蓋和獲�。辉O(shè)計(jì)GPS模塊保證系統(tǒng)作為主時(shí)鐘的精確性和可靠性。軟件部分設(shè)計(jì)了PTP時(shí)鐘狀態(tài)機(jī)和最佳主時(shí)鐘算法,用于本地時(shí)鐘自主選擇其在PTP系統(tǒng)內(nèi)的主時(shí)鐘,保證PTP系統(tǒng)的穩(wěn)定運(yùn)行；設(shè)計(jì)了報(bào)文處理程序,用于正確收發(fā)報(bào)文；設(shè)計(jì)了本地時(shí)鐘調(diào)節(jié)程序,當(dāng)本地時(shí)鐘為從時(shí)鐘時(shí),通過(guò)偏移量調(diào)節(jié)和頻率調(diào)節(jié)算法,完成與主時(shí)鐘的精確同步；同時(shí)設(shè)計(jì)了相關(guān)硬件的驅(qū)動(dòng)程序,保證時(shí)鐘系統(tǒng)的穩(wěn)定運(yùn)行。論文最后給出驗(yàn)證方案,搭建IEEE1588時(shí)鐘同步系統(tǒng)同步精度測(cè)試平臺(tái)并實(shí)驗(yàn),根據(jù)采樣數(shù)據(jù)和輸出秒脈沖波形的分析證明該系統(tǒng)設(shè)計(jì)的合理性,其同步精度可滿足智能變電站的需求。
[Abstract]:In recent years, the State Grid has made great efforts to build a strong smart grid, and the role of intelligent substation, which is the basis of it, has become more and more important. Because the smart grid has the characteristic of distributed structure, it needs to keep the consistency and accuracy of the action from top to bottom, so it is required that the intelligent substation and the equipment in the substation operate under the unified time standard. Although there are a lot of clock synchronization techniques available, However, it is impossible to improve the timing accuracy of intelligent substation. IEEE1588 precise time synchronization protocol can not guarantee reliable operation and save cost, which provides a new solution for intelligent substation clock synchronization. Depending on the existing communication network, the sub-microsecond synchronization accuracy can be realized. According to IEEE1588 precise time protocol, a clock synchronization system based on FPGA DM9000 DP83640 is designed to solve the synchronization problem of intelligent substation. The system can synchronize the slave clock with the slave clock as well as the slave clock. This paper first introduces the synchronization mechanism and related principles of IEEE1588 protocol, and describes the main clock synchronization model: PTP clock attribute PTP message and data set. On this basis, it determines the overall framework of clock synchronization system. In the hardware part, FPGA is used as the main control chip to complete the maintenance of the related program and state machine, DM9000 is used as the Ethernet controller, DP83640 is used as the physical layer chip to make the Mii interface independent, and the timestamp information is stamped and obtained. GPS module is designed to ensure the accuracy and reliability of the system as the master clock. In the software part, the PTP clock state machine and the best master clock algorithm are designed, which can be used to select the master clock in the PTP system independently to ensure the stable operation of the PTP system, and the message processing program is designed to send and receive the message correctly. The local clock adjusting program is designed. When the local clock is slave clock, the accurate synchronization with the master clock is accomplished by offset adjustment and frequency adjustment algorithm. At the same time, the related hardware driver is designed to ensure the stable operation of the clock system. At the end of the paper, the verification scheme is given, and the synchronization precision test platform of IEEE1588 clock synchronization system is built and experimented. According to the analysis of sampling data and output second pulse waveform, the rationality of the system design is proved. Its synchronization accuracy can meet the needs of intelligent substation.
【學(xué)位授予單位】：大連理工大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN791;TM76

【參考文獻(xiàn)】

相關(guān)期刊論文 前3條

1 張秋雁;李鵬程;肖監(jiān);歐家祥;張志;;電子式互感器數(shù)字輸出校驗(yàn)系統(tǒng)的研究[J];電測(cè)與儀表;2012年01期

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本文編號(hào)：2072230