基于FPGA的數(shù)字頻率計(jì)設(shè)計(jì)與仿真
本文選題:頻率測(cè)量 + FPGA; 參考:《黑龍江大學(xué)》2015年碩士論文
【摘要】:本文綜述了頻率計(jì)的發(fā)展,介紹了測(cè)量頻率的常用方法,并進(jìn)行優(yōu)缺點(diǎn)比較后,選擇脈沖計(jì)數(shù)法作為本次設(shè)計(jì)的方法。由于計(jì)數(shù)法中內(nèi)部計(jì)數(shù)器的個(gè)數(shù)決定了頻率計(jì)的總量程,設(shè)計(jì)上中選擇七個(gè)計(jì)數(shù)器作為頻率計(jì)測(cè)量單位。闡述了查找表原理和結(jié)構(gòu),給出了組合邏輯電路當(dāng)中,如果輸入量固定,那么輸出量也是相對(duì)固定的原理。對(duì)FPGA的數(shù)字邏輯實(shí)現(xiàn)原理進(jìn)行了相關(guān)分析,通過(guò)進(jìn)位邏輯將多個(gè)單元相連,可以由FPGA來(lái)實(shí)現(xiàn)復(fù)雜的邏輯,最后采用Verilog語(yǔ)言對(duì)數(shù)字頻率計(jì)各功能模塊和系統(tǒng)進(jìn)行了設(shè)計(jì)仿真。本文在Quartus II軟件平臺(tái)上,采用Verilog語(yǔ)言設(shè)計(jì)了一種頻率范圍為1Hz~100MHz的高精度數(shù)字頻率計(jì),頻率測(cè)量的相對(duì)誤差小于10-5,對(duì)本文設(shè)計(jì)的數(shù)字頻率計(jì)進(jìn)行了優(yōu)化,降低了頻率計(jì)的可見(jiàn)誤差,提高頻率測(cè)量精度,為了在1Hz~100MHz頻率范圍內(nèi)能夠達(dá)到較小的誤差,本文以100kHz為分界點(diǎn),當(dāng)被測(cè)信號(hào)頻率小于100kHZ趨向低頻時(shí),采用測(cè)周法,而當(dāng)被測(cè)信號(hào)頻率大于100kHz時(shí)趨向高頻時(shí),使用測(cè)頻法使測(cè)量精度更高,最終測(cè)量精度基本達(dá)到設(shè)計(jì)要求。
[Abstract]:In this paper, the development of frequency meter is reviewed, and the common methods of frequency measurement are introduced. After comparing the advantages and disadvantages, the pulse counting method is selected as the method of this design. Because the number of internal counters in the counting method determines the total process of the cymometer, seven counters are chosen as the measuring units of the cymometer in the design. The principle and structure of look-up table are expounded. The principle of relative fixed output is given in combinatorial logic circuit if input is fixed. This paper analyzes the realization principle of digital logic of FPGA, connects several units through carry logic, and realizes complex logic by FPGA. Finally, the function modules and systems of digital frequency meter are designed and simulated by Verilog language. In this paper, a high precision digital cymometer with frequency range of 1Hz~100MHz is designed by using Verilog language on Quartus II software platform. The relative error of frequency measurement is less than 10 ~ (-5). The digital cymometer designed in this paper is optimized. The visible error of the cymometer is reduced, and the accuracy of frequency measurement is improved. In order to achieve a smaller error in the frequency range of 1Hz~100MHz, in this paper, when the frequency of the measured signal is less than the low frequency of 100kHZ, the cycle measurement method is adopted when the frequency of the measured signal is less than the low frequency of 100kHZ. When the signal frequency is larger than 100kHz, the frequency measurement method is used to make the measurement accuracy higher, and the final measurement precision basically meets the design requirements.
【學(xué)位授予單位】:黑龍江大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2015
【分類(lèi)號(hào)】:TM935.133;TN791
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