本文關(guān)鍵詞：TDR差分測(cè)量方法與多點(diǎn)校準(zhǔn)技術(shù)研究與軟件實(shí)現(xiàn)　出處：《電子科技大學(xué)》2014年碩士論文　論文類型：學(xué)位論文

  更多相關(guān)文章： 特性阻抗測(cè)試 等效偽差分 多點(diǎn)校準(zhǔn) 數(shù)據(jù)庫(kù)

【摘要】：TDR特性阻抗測(cè)試儀是一款利用時(shí)域反射法測(cè)量阻抗不連續(xù)點(diǎn)處特性阻抗的儀器,適用于電路板制造商對(duì)PCB跡線進(jìn)行出廠前質(zhì)量檢驗(yàn)。目前項(xiàng)目組自主研發(fā)成功了Asida系列特性阻抗測(cè)試儀器,但是在核心的校準(zhǔn)與測(cè)量技術(shù)上面還不夠完善,需要進(jìn)一步的優(yōu)化,來(lái)提高整個(gè)系統(tǒng)的測(cè)量精度。本論文以提高特性阻抗測(cè)試儀的精度為目標(biāo),主要工作內(nèi)容有以下幾方面:首先,根據(jù)時(shí)域反射計(jì)(TDR)的基本原理和儀器需要實(shí)現(xiàn)的功能,制定TDR特性阻抗測(cè)試儀的總體方案,并根據(jù)總體方案利用面向?qū)ο蠼y(tǒng)一建模語(yǔ)言UML進(jìn)行軟件需求分析建模和軟件設(shè)計(jì)分析建模;第二,分析對(duì)比目前業(yè)界的差分測(cè)量算法,根據(jù)自身硬件條件選擇了對(duì)硬件要求較低,只需單脈沖源和單取樣頭,但對(duì)軟件算法要求較高的等效偽差分測(cè)試算法,這種差分測(cè)試方法不僅降低了開發(fā)成本,并且測(cè)量結(jié)果也在允許的誤差范圍內(nèi);第三,提出了一種改進(jìn)的校準(zhǔn)方法,將傳統(tǒng)的兩點(diǎn)校準(zhǔn)改進(jìn)為多點(diǎn)校準(zhǔn),測(cè)量誤差比傳統(tǒng)方法降低了2%,傳統(tǒng)方法的誤差為5%,并將改進(jìn)的校準(zhǔn)方法和等效偽差分測(cè)量算法在特性阻抗測(cè)試儀中實(shí)現(xiàn);第四,重新設(shè)計(jì)了特性阻抗測(cè)試儀的數(shù)據(jù)存儲(chǔ)模塊,采用了數(shù)據(jù)庫(kù)管理方案彌補(bǔ)了文檔管理方式的缺陷,為項(xiàng)目的進(jìn)一步發(fā)展提供了數(shù)據(jù)存儲(chǔ)空間保證;最后,總結(jié)了影響特性阻抗測(cè)量精度的幾個(gè)因素,并給出了解決方案,確保整個(gè)系統(tǒng)能夠提供更精確的測(cè)量服務(wù)。本文的校準(zhǔn)與測(cè)試算法以及數(shù)據(jù)存儲(chǔ)方法均是在VC++平臺(tái)上實(shí)現(xiàn),并根據(jù)項(xiàng)目需要實(shí)現(xiàn)的目標(biāo),聯(lián)合硬件平臺(tái)進(jìn)行聯(lián)調(diào)測(cè)試。經(jīng)過(guò)大量的實(shí)際測(cè)量實(shí)驗(yàn),將本文結(jié)果與泰克、polar等國(guó)外儀器的測(cè)量結(jié)果進(jìn)行了比較和分析,驗(yàn)證了等效偽差分測(cè)量方法和多點(diǎn)校準(zhǔn)技術(shù)的正確性。數(shù)據(jù)存儲(chǔ)模塊,實(shí)現(xiàn)了校準(zhǔn)測(cè)量數(shù)據(jù)穩(wěn)定存取、檢索和動(dòng)態(tài)擴(kuò)容,解決了測(cè)量數(shù)據(jù)量大的存儲(chǔ)問(wèn)題。目前該款軟件和儀器配合使用的Asida第三代產(chǎn)品能夠自動(dòng)化、批量化、快速、準(zhǔn)確地對(duì)PCB跡線進(jìn)行測(cè)試,且已經(jīng)通過(guò)系統(tǒng)功能測(cè)試和性能測(cè)試可以提供給電路板制造商使用,此外系統(tǒng)還有任務(wù)管理,波形分析,數(shù)據(jù)顯示,結(jié)果分析等功能。
[Abstract]:The TDR characteristic impedance tester is a kind of instrument which uses time domain reflectance method to measure the characteristic impedance at the point of impedance discontinuity. It is suitable for the PCB manufacturer to carry on the pre-factory quality inspection to the PCB trace. At present, the project team has independently developed the Asida series characteristic impedance test instrument. However, the core calibration and measurement technology is not perfect, and further optimization is needed to improve the measurement accuracy of the whole system. This paper aims to improve the accuracy of the characteristic impedance tester. The main work is as follows: firstly, according to the basic principle of time-domain reflectometer (TDR) and the functions that the instrument needs to realize, the overall scheme of TDR characteristic impedance tester is established. According to the overall scheme, software requirement analysis modeling and software design analysis modeling are carried out by using object-oriented unified modeling language (UML). Second, the analysis and comparison of the current industry differential measurement algorithm, according to their own hardware conditions to select the hardware requirements are low, only need a single pulse source and single sampling head. But the equivalent pseudo difference testing algorithm which requires higher software algorithm not only reduces the development cost but also results within the allowable error range. Thirdly, an improved calibration method is proposed. The traditional two-point calibration is improved to multi-point calibration. The measurement error is reduced by 2% compared with the traditional method, and the error of the traditional method is 5%. The improved calibration method and the equivalent pseudo-difference measurement algorithm are implemented in the characteristic impedance tester. In 4th, the data storage module of the characteristic impedance tester was redesigned, and the database management scheme was adopted to make up the defect of the document management mode, which provided the data storage space guarantee for the further development of the project. Finally, several factors affecting the precision of characteristic impedance measurement are summarized, and the solutions are given. To ensure that the whole system can provide more accurate measurement services. The calibration and testing algorithms and data storage methods are implemented on VC platform, and according to the project needs to achieve the goal. Through a large number of practical measurement experiments, the results of this paper are compared and analyzed with the measurement results of foreign instruments such as Tek polar and so on. The validity of the equivalent pseudo-differential measurement method and multi-point calibration technology is verified. The data storage module realizes the stable access, retrieval and dynamic expansion of calibration measurement data. It solves the storage problem of large amount of measurement data. At present, the third generation of Asida products, which are used together with the software and instruments, can automate, batch, quickly and accurately test the PCB trace line. In addition, the system also has functions of task management, waveform analysis, data display, result analysis and so on.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：TM934.7

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本文編號(hào)：1395873