本文關鍵詞： DSO 時間交錯采樣 TIADC FPGA 失配誤差補償 拉格朗日插值　出處：《西南交通大學》2017年碩士論文　論文類型：學位論文

【摘要】：示波器廣泛的用于信號的分析與測量,扮演著不可或缺的重要角色。隨著技術快速的發(fā)展,數(shù)字存儲示波器性能進一步加強,逐漸取代了模擬示波器。而便攜式示波器作為示波器發(fā)展的一個分支,克服了普通數(shù)字存儲示波器體積龐大,功耗較高,不便于攜帶等缺點,廣泛的應用于一些特殊的應用場合。為滿足對復雜帶寬信號進行實時捕獲與測量要求,提高采樣率對示波器來說顯得尤為重要。在現(xiàn)有的條件下,時間交錯采樣技術可以有效的提高系統(tǒng)的采樣率,從而突破單片模數(shù)轉(zhuǎn)換器芯片轉(zhuǎn)換速率對系統(tǒng)采樣率的限制,實現(xiàn)高速采樣。雖然TIADC(時間交錯采樣模數(shù)轉(zhuǎn)換器)可以提高系統(tǒng)采樣率,但是由于ADC通道之間的不一致性以及采樣時間間隔不均勻等因素會引入誤差,導致示波器性能下降。因此本課題主要從如下兩個方面展開。一方面,本課題將基于FPGA設計一款便攜性低功耗數(shù)字存儲示波器。另一方面,本課題將對TIADC系統(tǒng)中的失配誤差進行估計和校準,提高系統(tǒng)的無雜散動態(tài)范圍。具體內(nèi)容如下:根據(jù)TIADC系統(tǒng)的結構及原理,推導TIADC的系統(tǒng)模型。從實際應用場景分析ADC通道之間失配誤差產(chǎn)生原因及來源。并根據(jù)得到的數(shù)學模型分析TIADC在理想情況下和誤差存在的情況下輸出的頻譜特性。提出了一套完整的TIADC失配誤差消除方法。該方法主要分為失調(diào)誤差估計以及失調(diào)誤差補償兩部分。該方法在具有很高的失配誤差參數(shù)估計精度的情況下依然具有較低的計算復雜度。失調(diào)和增益失配誤差補償是基于誤差參數(shù)來實現(xiàn)的,而采樣時間失配誤差補償則是采用一種簡化拉格朗日插值法來實現(xiàn)。該補償結構采用單精度浮點設計,并在嚴重的失配誤差條件下(高達5%的失調(diào)和增益誤差以及10%的超前的或者滯后的采樣時間誤差)對該結構進行了仿真。該補償?shù)难a償效果使無雜散動態(tài)范圍提升達53dB。除此之外,該補償結構并不受TIADC通道數(shù)目的限制�；趩纹現(xiàn)PGA成功開發(fā)了一款便攜式低功耗數(shù)字存儲示波器。為滿足輸入信號的寬動態(tài)范圍要求,設計了增益靈活可調(diào)的模擬前端電路。采用雙通道模數(shù)轉(zhuǎn)換器設計,支持時間交錯采樣模式,成倍的提升了示波器的采樣率。分析了多種內(nèi)插方式,采用了正弦插值解決了采樣點不足時恢復波形的問題。
[Abstract]:Oscilloscopes are widely used in signal analysis and measurement, playing an indispensable role. With the rapid development of technology, the performance of digital storage oscilloscope is further enhanced. The portable oscilloscope, as a branch of the oscilloscope development, overcomes the shortcomings of the ordinary digital storage oscilloscope, such as large volume, high power consumption, and not easy to carry. In order to meet the requirements of real-time acquisition and measurement of complex bandwidth signals, it is particularly important for oscilloscopes to improve the sampling rate. The time-interlaced sampling technique can effectively improve the sampling rate of the system, thus breaking through the limitation of the conversion rate of the single-chip A / D converter chip to the sampling rate of the system. Although TIA DC (time interlaced sampling A / D converter) can improve the sampling rate of the system, because of the inconsistency between the ADC channels and the uneven sampling time interval, the error will be introduced. As a result, the performance of oscilloscope is degraded. Therefore, this subject is mainly developed from the following two aspects. On the one hand, this project will design a portable low-power digital storage oscilloscope based on FPGA. This subject will estimate and calibrate the mismatch error in TIADC system to improve the dynamic range of the system without stray. The specific contents are as follows: according to the structure and principle of TIADC system, The system model of TIADC is derived. The causes and sources of mismatch errors between ADC channels are analyzed from the practical application scene. According to the obtained mathematical model, the spectrum characteristics of TIADC output under ideal conditions and the existence of errors are analyzed. In this paper, a complete method of TIADC mismatch error elimination is proposed. The method is mainly divided into two parts: mismatch error estimation and offset error compensation. This method still has high precision of mismatch error parameter estimation. Offset and gain mismatch error compensation is based on error parameters. The compensation of sampling time mismatch is realized by a simplified Lagrangian interpolation method. The compensation structure is designed with single precision floating-point. The structure is simulated under the condition of serious mismatch error (up to 5% misalignment and gain error and 10% lead or lag sampling time error). The compensation effect of the compensation makes there is no stray dynamic range. Up to 53dB. in addition, The compensation structure is not limited by the number of TIADC channels. A portable low-power digital storage oscilloscope is successfully developed based on monolithic FPGA. An analog front-end circuit with flexible gain and adjustable gain is designed. The dual-channel analog-to-digital converter is designed to support time-staggered sampling mode, which can increase the sampling rate of oscilloscope exponentially. Sinusoidal interpolation is used to solve the problem of waveform recovery when sampling points are insufficient.
【學位授予單位】：西南交通大學
【學位級別】：碩士
【學位授予年份】：2017
【分類號】：TM935.3

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