面向海洋可控源電磁勘探的電磁數(shù)據(jù)記錄儀設(shè)計
本文選題:可控源 + 數(shù)據(jù)采集 ; 參考:《中國海洋大學(xué)》2014年碩士論文
【摘要】:隨著經(jīng)濟的高速發(fā)展,人類對地球資源的依賴日益增大。陸上資源已經(jīng)無法滿足經(jīng)濟高速發(fā)展的需要。海洋資源因其巨大的經(jīng)濟潛力,越來越被各個國家所重視。尤其是我國對能源的需求逐年攀升。能源危機已影響到了國家的經(jīng)濟穩(wěn)定和持續(xù)發(fā)展。研制出具有自主知識產(chǎn)權(quán)的電磁數(shù)據(jù)記錄儀系統(tǒng)是提高海底資源勘探能力的重要舉措。本文依托國家高技術(shù)研究發(fā)展計劃(863計劃)課題“海洋可控源水下系統(tǒng)裝備研制和理論研究”和山東省科技發(fā)展計劃課題“深海電場觀測系統(tǒng)關(guān)鍵技術(shù)研究”結(jié)合項目實際研發(fā)過程中的技術(shù)積累,以超低噪聲、低頻斬波放大和高精度、低漂移時鐘技術(shù)為保障,利用高精度Σ-Δ型A/D轉(zhuǎn)換器和FPGA+ARM技術(shù)完成高分辨率、低噪聲、低頻微弱信號放大的電磁數(shù)據(jù)記錄儀系統(tǒng)的設(shè)計。 本文主要圍繞數(shù)據(jù)采集站中的電磁數(shù)據(jù)記錄儀進行研制。電磁數(shù)據(jù)記錄儀主要將電磁場傳感器接收回來的信號進行放大處理,然后再利用FPGA技術(shù)對多個Σ-Δ型ADC進行同步采集。將采集回來的數(shù)據(jù)利用FSMC總線傳給ARM,利用ARM結(jié)合FATFS文件系統(tǒng)將數(shù)據(jù)存儲到CF卡。設(shè)計中集成了超低噪聲低頻斬波放大、可編程放大器、多采樣率的24位Σ-Δ型ADC、高可靠性數(shù)據(jù)存儲,并以高精度時鐘控制單元對多臺采集站之間實現(xiàn)同步采集。利用FPGA為核心的數(shù)字設(shè)計對采集系統(tǒng)進行采樣控制和數(shù)據(jù)處理,,提高了數(shù)據(jù)處理速度和精度,同時也優(yōu)化了整個系統(tǒng)硬件電路設(shè)計的規(guī)模。 本文從課題的研究意義、國內(nèi)外研究動態(tài)、實現(xiàn)方法和技術(shù)等方面入手,對整個系統(tǒng)的設(shè)計做了詳細(xì)的理論分析并完成了軟硬件設(shè)計。論文主要取得以下研究成果:完成了電磁數(shù)據(jù)記錄儀的硬件原理圖設(shè)計,并加工成PCB板,完成整個硬件電路的調(diào)試;利用Verilog HDL語言完成整個FPGA的控制邏輯設(shè)計,通過仿真驗證了邏輯功能的正確性;以ARM為平臺,完成了所有軟件的設(shè)計開發(fā)和調(diào)試。對整個系統(tǒng)進行了聯(lián)調(diào),在野外做了一系列測試完成了項目提出的性能指標(biāo)。 系統(tǒng)設(shè)計的主要創(chuàng)新性主要體現(xiàn)在:采用基于FPGA的數(shù)字邏輯設(shè)計方式,在硬件方面降低了電路設(shè)計的規(guī)模,節(jié)約了成本并提高了系統(tǒng)的實時性和可靠性,軟件部分也易于仿真和測試;采用高精度的24為Σ-Δ型ADC提高了采集數(shù)據(jù)的分辨率及動態(tài)范圍;設(shè)計了一套智能電源管理系統(tǒng),有效降低了系統(tǒng)的功耗;采用時鐘標(biāo)定系統(tǒng)對高精度時鐘溫度補償模塊進行標(biāo)定,提高了時鐘的精度。
[Abstract]:With the rapid development of economy, human dependence on the earth's resources is increasing. The land resources have been unable to meet the needs of rapid economic development. Because of its huge economic potential, marine resources have been paid more and more attention by various countries, especially in China, the demand for energy has increased year by year. The energy crisis has affected the economic stability of the country. The development of the electromagnetic data recorder with independent intellectual property rights is an important measure to improve the exploration ability of the submarine resources. This paper is based on the national high technology research and development plan (863 plan), "the research and development of marine controlled underwater system equipment and theory" and the project of "deep-sea electricity" in Shandong province. The key technology research of field observation system is combined with the technology accumulation in the process of the project, with ultra low noise, low frequency chopping and high precision, low drift clock technology as the guarantee, and using high precision sigma delta A/D converter and FPGA+ARM technology to complete the electromagnetic data recorder system with high resolution, low noise and low frequency weak signal amplification. Design.
This paper mainly focuses on the development of the electromagnetic data recorder in the data acquisition station. The electromagnetic data recorder mainly amplifies the signals received by the electromagnetic field sensor, and then uses the FPGA technology to synchronize the multiple sigma delta ADC. The collected data is transmitted to ARM by FSMC bus, and the FATFS text is combined with ARM. The system stores the data to the CF card. The design integrates ultra low noise low frequency chopper amplification, programmable amplifier, 24 bit sigma delta ADC with multi sampling rate, high reliability data storage, and synchronous acquisition between multiple acquisition stations with high precision clock control unit. Sampling and control of acquisition system using FPGA as the core digital design Data processing improves the speed and accuracy of data processing, and optimizes the scale of the hardware circuit design of the whole system.
This paper makes a detailed theoretical analysis on the design of the whole system and completes the design of hardware and software in detail from the research significance of the subject, the research trends at home and abroad, the realization method and technology. The paper mainly obtains the following research results: the design of the hardware schematic of the electromagnetic data recorder is completed, and the PCB board is processed to complete the whole hard work. The circuit is debugged; the whole FPGA control logic design is completed using Verilog HDL language. The correctness of the logic function is verified by simulation. The design, development and debugging of all software are completed on the platform of ARM. The whole system is adjusted, and a series of tests in the field have completed the performance index of the project.
The main innovation of the system design is: using the digital logic design method based on FPGA, reducing the scale of the circuit design in the hardware, saving the cost and improving the real-time and reliability of the system. The software part is also easy to simulate and test, and the high precision of 24 is the sigma delta ADC to improve the resolution of the data. A set of intelligent power management system is designed to effectively reduce the power consumption of the system, and the clock calibration system is used to calibrate the high precision clock temperature compensation module, and the precision of the clock is improved.
【學(xué)位授予單位】:中國海洋大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2014
【分類號】:P631.325
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