本文選題：Tof圖像傳感器　切入點(diǎn)：SPAD　出處：《深圳大學(xué)》2017年碩士論文　論文類型：學(xué)位論文

【摘要】：Tof圖像傳感器由于在激光三維成像、自動(dòng)駕駛、機(jī)器人視覺、手勢(shì)識(shí)別等方面的廣闊應(yīng)用前景成為研究的熱點(diǎn)。和基于間接時(shí)差測(cè)距法的Tof圖像傳感器對(duì)比,基于直接時(shí)差測(cè)距法的Tof圖像傳感器有成像速度快,受光子噪聲影響小等優(yōu)點(diǎn),因而更多的適用于快速運(yùn)動(dòng)場(chǎng)景成像和遠(yuǎn)距離探測(cè),其精度主要由單光子雪崩二極管(SPAD)探測(cè)器性能和時(shí)間數(shù)字轉(zhuǎn)換(TDC)電路精度決定,這也是該技術(shù)的發(fā)展難點(diǎn),本文針對(duì)該問題做了深入的研究。第一,傳統(tǒng)技術(shù)的SPAD普遍器件面積大,雪崩擊穿電壓高,不利于高度集成。本文基于SMIC 0.13μm CIS工藝,優(yōu)化設(shè)計(jì)出具有較低雪崩擊穿電壓和較小器件面積的SPAD結(jié)構(gòu),通過Silvaco TCAD工藝器件特性仿真證明該結(jié)構(gòu)設(shè)計(jì)滿足邊緣電場(chǎng)低等要求,并根據(jù)不同的結(jié)構(gòu)尺寸,設(shè)計(jì)了11個(gè)SPAD版本,根據(jù)流片測(cè)試結(jié)果來實(shí)際驗(yàn)證。第二,SPAD淬滅電路的設(shè)計(jì)。根據(jù)設(shè)計(jì)要求,本文采用改進(jìn)型的主動(dòng)淬滅電路,通過電流控制模式以提高電路的響應(yīng)速度,利用低壓CMOS晶體管實(shí)現(xiàn)了性能良好的主動(dòng)淬滅電路。將整體死時(shí)間控制在了5ns,具有迅速淬滅、結(jié)構(gòu)簡(jiǎn)單,版圖面積小、高集成度的優(yōu)點(diǎn),并由時(shí)序要求設(shè)計(jì)了精確的延時(shí)電路,從而對(duì)復(fù)位開關(guān)進(jìn)行復(fù)位控制。第三,高精度TDC電路設(shè)計(jì),本文根據(jù)直接計(jì)數(shù)法和游標(biāo)法,設(shè)計(jì)了由粗精度測(cè)量和細(xì)精度測(cè)量組成的TDC電路,其中細(xì)精度測(cè)量是設(shè)計(jì)重點(diǎn),通過游標(biāo)法兩級(jí)延時(shí)鏈的方式來實(shí)現(xiàn),從而達(dá)到ps量級(jí)的時(shí)間分辨率。本文優(yōu)化設(shè)計(jì)的SPAD具有較低雪崩擊穿電壓,淬滅電路具有很快的淬滅速度,整體死時(shí)間約為5ns,達(dá)到目前文獻(xiàn)報(bào)道中最好的性能。同時(shí)整體像素結(jié)構(gòu)版圖所占面積很小,從而具有很高的集成度。目前國(guó)外對(duì)Tof圖像傳感器的研究較為領(lǐng)先。國(guó)內(nèi)研究成果和理論水平都與國(guó)外有較大差距,大多停留在軟件仿真層面上,本設(shè)計(jì)在完成像素單元設(shè)計(jì)后通過SMIC 0.13μm CIS工藝流片來實(shí)際驗(yàn)證,關(guān)于這方面的研究,對(duì)提高我國(guó)在該領(lǐng)域的研究水平有著非常重要的意義。
[Abstract]:Tof image sensor has become a hot research area because of its wide application prospect in laser 3D imaging, autopilot, robot vision, gesture recognition and so on, and compared with Tof image sensor based on indirect time difference ranging. The Tof image sensor based on direct moveout ranging method has the advantages of fast imaging speed and less influence by photon noise, so it is more suitable for fast moving scene imaging and remote detection. Its precision is mainly determined by the performance of single photon avalanche diode (SPAD) detector and the precision of time-digital converter (TDC) circuit. This is also a difficult point in the development of this technology. Traditional SPAD devices have large area and high avalanche breakdown voltage, which is not conducive to high integration. Based on SMIC 0.13 渭 m CIS process, the SPAD structure with lower avalanche breakdown voltage and smaller device area is optimized and designed in this paper. The simulation results of Silvaco TCAD process show that the design meets the requirements of low edge electric field, and 11 SPAD versions are designed according to different structure sizes. The second is the design of Spad quenching circuit. According to the design requirements, the improved active quenching circuit is adopted in this paper, and the response speed of the circuit is improved by current control mode. The active quenching circuit with good performance is realized by using low voltage CMOS transistor. The whole dead time is controlled at 5ns, which has the advantages of rapid quenching, simple structure, small layout area and high integration, and the precise delay circuit is designed according to the timing requirement. Thirdly, the high precision TDC circuit is designed. According to the direct counting method and the Vernier method, the TDC circuit composed of coarse precision measurement and fine precision measurement is designed, in which fine precision measurement is the key point of the design. By using the two-stage delay chain of Vernier method, the time resolution of PS is achieved. The optimized design of SPAD has lower avalanche breakdown voltage, and the quench circuit has fast quenching speed. The overall dead time is about 5 ns, which is the best performance reported in the current literature. At the same time, the size of the overall pixel structure is very small. So it has a high level of integration. At present, the research of Tof image sensor in foreign countries is leading. There is a big gap between domestic research results and theoretical level, and most of them stay on the level of software simulation. The design is verified by SMIC 0.13 渭 m CIS process after completing the pixel unit design. The research on this aspect is of great significance to improve the research level in this field in China.
【學(xué)位授予單位】：深圳大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類號(hào)】：TP391.41;TP212

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