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量子密鑰分發(fā)實(shí)時(shí)處理技術(shù)研究

發(fā)布時(shí)間:2019-06-02 16:14
【摘要】:量子密鑰分發(fā)系統(tǒng)是量子物理原理在密碼學(xué)領(lǐng)域獲得實(shí)用化應(yīng)用最早的-個(gè)研究領(lǐng)域。它分發(fā)的密鑰具有“絕對(duì)安全”的特性,這個(gè)特性來(lái)源于量子力學(xué)中的不可克隆原理和測(cè)量塌縮理論,具有很高的軍事和民用價(jià)值。1991年誕生了世界上第一個(gè)QKD系統(tǒng)原型,它只是一個(gè)簡(jiǎn)單的演示系統(tǒng),由Bennette等人完成。隨后出現(xiàn)更為復(fù)雜和完善的QKD系統(tǒng),QKD的通訊距離和密鑰生成速率都在不斷的提高。QKD系統(tǒng)發(fā)展到現(xiàn)在,已經(jīng)進(jìn)入到了多用戶互聯(lián)的QKD網(wǎng)絡(luò)時(shí)代,而QKD網(wǎng)絡(luò)的結(jié)構(gòu)也在不停的優(yōu)化和升級(jí)當(dāng)中。當(dāng)今QKD網(wǎng)絡(luò)的杰出代表有歐洲的SECOQC量子網(wǎng),日本的東京高速量子網(wǎng),和中國(guó)的全通型量子通話網(wǎng)以及“合肥—六安—舒城”的城域量子通信網(wǎng)絡(luò)。 QKD系統(tǒng)的發(fā)展已經(jīng)進(jìn)入了高速(高密鑰生成速率)的階段,應(yīng)用最新的半導(dǎo)體工藝技術(shù),采用1GHz以上發(fā)射頻率的激光器,使用探測(cè)效率極高的超導(dǎo)探測(cè)器,獲得成碼率更高的QKD系統(tǒng)。QKD系統(tǒng)實(shí)時(shí)處理的壓力在于QKD后處理過(guò)程,因?yàn)樗荙KD系統(tǒng)電子學(xué)處理延遲最大的模塊。QKD后處理過(guò)程是為了消除Alice和Bob密鑰的不同和提高安全性采取一系列操作,它包括四個(gè)步驟:基矢比對(duì),身份認(rèn)證,糾錯(cuò)和隱私放大。本文以滿足高速Q(mào)KD系統(tǒng)為目標(biāo),重點(diǎn)研究了QKD后處理過(guò)程中的實(shí)時(shí)技術(shù)。從實(shí)現(xiàn)實(shí)時(shí)技術(shù)的平臺(tái)方面考慮,隨著對(duì)QKD系統(tǒng)設(shè)備的小型化和便攜性需求方面的提高,同時(shí)結(jié)合近些年發(fā)展迅速的Field Programmable Gate Array (FPGA)技術(shù),本文重點(diǎn)研究了基于FPGA的QKD實(shí)時(shí)處理技術(shù)。QKD系統(tǒng)實(shí)時(shí)處理技術(shù)在硬件內(nèi)的實(shí)現(xiàn)具有特定的優(yōu)勢(shì),可以省去QKD設(shè)備和電腦通訊的數(shù)據(jù)帶寬壓力,充分利用后處理過(guò)程中的并行潛力提高處理速度。以QKD系統(tǒng)實(shí)時(shí)處理技術(shù)為主線,本文的研究?jī)?nèi)容包括:高效快速的糾錯(cuò)算法,高數(shù)據(jù)吞吐量的身份認(rèn)證和高速數(shù)據(jù)交換的經(jīng)典通道。 對(duì)于糾錯(cuò)模塊,我們?cè)O(shè)計(jì)和實(shí)現(xiàn)了兩種不同的方案:基于Winnow的快速糾錯(cuò)算法和基于LDPC糾錯(cuò)碼的快速糾錯(cuò)算法。其中基于Winnow的糾錯(cuò)算法在糾錯(cuò)效率和速度方面都有不錯(cuò)的表現(xiàn),是我們目前中低速的QKD系統(tǒng)中成功應(yīng)用的算法。而基于LDPC糾錯(cuò)碼的糾錯(cuò)算法,糾錯(cuò)時(shí)候只需要交互一次信息,在傳輸延遲大的系統(tǒng)實(shí)現(xiàn)優(yōu)勢(shì)最大,另外它在糾錯(cuò)效率和速度方面都有可以大幅提升的潛力,是后續(xù)高速Q(mào)KD系統(tǒng)中有望廣泛采用的算法;赪innow的快速糾錯(cuò)算法的采用的基本糾錯(cuò)碼是Hamming碼,從Winnow的基本思想出發(fā),我們?cè)诙伍L(zhǎng)選取,循環(huán)次數(shù)設(shè)置等方面進(jìn)行優(yōu)化,并且提出了使用雙線性移位寄存器(LFSR)的隨機(jī)置換方案,可以獲得和使用真隨機(jī)數(shù)一樣的“打亂”效果。基于LDPC糾錯(cuò)碼的快速糾錯(cuò)算法采用QC-LDPC作為校驗(yàn)矩陣,應(yīng)用半串行解碼算法,該算法的算法結(jié)構(gòu)簡(jiǎn)單,沒(méi)有復(fù)雜的雙曲函數(shù)運(yùn)算和乘除運(yùn)算,適合硬件結(jié)構(gòu)實(shí)現(xiàn),另外該算法相對(duì)于傳統(tǒng)的BP解碼算法可以節(jié)省大部分的存儲(chǔ)資源。在算法結(jié)構(gòu)方面,我們提出了一個(gè)新穎的信息鉗位功能函數(shù),實(shí)現(xiàn)簡(jiǎn)單,可以極大的提升糾錯(cuò)性能。 對(duì)于身份認(rèn)證模塊,我們實(shí)現(xiàn)了基于LFSR的Toeplitz矩陣的身份認(rèn)證方案。QKD系統(tǒng)的最核心特征是它的“絕對(duì)安全”性質(zhì),基于LFSR的Toeplitz矩陣的身份認(rèn)證具備“絕對(duì)安全”的特性。在模塊設(shè)計(jì)和實(shí)現(xiàn)方面,對(duì)算法結(jié)構(gòu)做了優(yōu)化,提高并行度以實(shí)現(xiàn)速度的提升。該身份認(rèn)證算法的實(shí)質(zhì)是高維度的矩陣乘法,分別從優(yōu)化矩陣乘法行方向和列方向的運(yùn)算提出了一次并行化結(jié)構(gòu)和二次并行化結(jié)構(gòu),實(shí)現(xiàn)了高度并行化的身份認(rèn)證計(jì)算模塊。 對(duì)于高速數(shù)據(jù)交互的經(jīng)典通道,選擇USB3.0作為實(shí)現(xiàn)高速數(shù)據(jù)通道的接口總線。該數(shù)據(jù)通道中需要傳輸?shù)腝KD系統(tǒng)的經(jīng)典信息包括:基矢比對(duì)信息,糾錯(cuò)信息,身份認(rèn)證碼。我們使用Cypress公司生產(chǎn)的FX3芯片作為USB3.0的協(xié)議芯片,應(yīng)用該芯片提供的從FIFO工作模式。設(shè)計(jì)了相應(yīng)的固件,在FPGA中設(shè)計(jì)了硬件接口模塊,在PC上設(shè)計(jì)了客戶端程序,實(shí)際測(cè)試速率達(dá)1.79Gbit/s。 文針對(duì)處于國(guó)際前沿的量子保密通訊中的量子密鑰分發(fā)系統(tǒng)后處理技術(shù)進(jìn)行探索性研究,研究?jī)?nèi)容包括高效快速的糾錯(cuò)算法,高數(shù)據(jù)吞吐量的身份認(rèn)證和高速數(shù)據(jù)交換的經(jīng)典通道,其研究成果將直接提升QKD的后處理性能,并成功用于城域量子通信試驗(yàn)示范網(wǎng),并將在應(yīng)用在后續(xù)的城際高速量子通訊網(wǎng)中。選題不僅具有理論研究?jī)r(jià)值,而且具有實(shí)際應(yīng)用價(jià)值。 本論文的主要?jiǎng)?chuàng)新點(diǎn)如下: 1.針對(duì)不同密鑰生成速率,完成了2種不同的實(shí)時(shí)糾錯(cuò)方案。對(duì)于低速和中速密鑰生成速率,基于Winnow糾錯(cuò)算法修改完成了一個(gè)適合于FPGA的快速并行設(shè)計(jì),并成功應(yīng)用于城域量子通信試驗(yàn)示范網(wǎng);對(duì)于高速及超高速密鑰生成速率,進(jìn)行了基于LDPC糾錯(cuò)碼的快速糾錯(cuò)算法的研究,完成了基于QC-LDPC使用串行解碼算法的硬件解碼器,能適應(yīng)于GHz發(fā)射頻率的QKD系統(tǒng)中。 2.針對(duì)QKD的安全性要求,開展了實(shí)時(shí)身份認(rèn)證技術(shù)的研究,實(shí)現(xiàn)了適合于FPGA實(shí)現(xiàn)的基于LFSR的Toeplitz矩陣的身份認(rèn)證方案,該方案具有“絕對(duì)安全”和高度并行化的特性,并成功應(yīng)用于量子保密通訊試驗(yàn)網(wǎng)。 3.針對(duì)高速量子密鑰分發(fā)系統(tǒng)中,大量經(jīng)典數(shù)據(jù)實(shí)時(shí)交互的需求,展開對(duì)高速數(shù)據(jù)通道的研究,完成了基于USB3.0和千兆網(wǎng)構(gòu)成了高速數(shù)據(jù)通道,將用于后續(xù)的高速量子密鑰分發(fā)系統(tǒng)中。
[Abstract]:The quantum key distribution system is the first to be used in the field of cryptography in the field of cryptography. The key to which it is distributed has the characteristics of "absolute safety", which is derived from the non-cloning principle in quantum mechanics and the theory of measurement and collapse, and has a high military and civilian value. The first QKD system prototype in the world was born in 1991, and it is just a simple demonstration system. It's done by Bennett et al. The communication distance and key generation rate of the QKD system, QKD, and QKD, which are more complex and perfect, are constantly increasing. The QKD system has been developed to the QKD network era of multi-user interconnection, and the structure of the QKD network is also constantly optimized and upgraded. The outstanding representative of the QKD network is the SECOQC quantum network in Europe, the Tokyo high-speed quantum network in Japan, and the China's all-pass quantum communication network and the "Shuicheng, Liuliang, Hefei" 's metro quantum communication network. The development of the QKD system has entered a high-speed (high-key generation rate) stage, and the latest semiconductor technology is applied, and the high-efficiency superconducting detector is used to obtain the QKD system with higher code rate by using the super-conducting detector with extremely high detection efficiency. The pressure of real-time processing of the QKD system is the post-QKD process, because it is the most delayed mode in the electronic processing of the QKD system. The post-QKD process is a series of actions to eliminate the differences in Alice and Bob's keys and to improve security, which includes four steps: base-to-target, identity authentication, error correction, and privacy In order to meet the high-speed QKD system, this paper focuses on the real-time technology in the post-QKD process. In view of the development of the platform of real-time technology, the QKD real-time processing technology based on FPGA is studied in this paper with the improvement of the miniaturization and the portability requirement of the QKD system equipment, and combining with the field Programmable Gate Array (FPGA) technology developed in recent years. The realization of the QKD system real-time processing technology in the hardware has specific advantages, the data bandwidth pressure of the QKD equipment and the computer communication can be saved, the parallel potential in the post-processing process can be fully utilized to improve the processing speed, Based on the QKD system real-time processing technology, the research contents of this paper are: efficient and fast error correction algorithm, high data throughput identity authentication and high-speed data exchange. We design and implement two different schemes for error correction module: fast error correction algorithm based on Winnow and fast error correction based on LDPC error correction code The error correction algorithm based on Winnow has good performance in error correction efficiency and speed, and is a successful application in the low-speed QKD system at present. And the error correction algorithm based on the LDPC error correction code only needs interactive information at the time of error correction, has the greatest advantage in a system with large transmission delay, and has the potential of greatly improving the error correction efficiency and speed, and is expected to be widely adopted in the subsequent high-speed QKD system. The basic error correction code used in the fast error correction algorithm based on Winnow is the Hamming code. From the basic idea of Winnow, we optimize the selection of the segment length and the number of cycles, and put forward the random setting using the bilinear shift register (LFSR). Alternatively, you can obtain and use the "to upset" Effect. The fast error correction algorithm based on the LDPC is used as the check matrix and the semi-serial decoding algorithm is applied. The algorithm has the advantages of simple structure, no complex hyperbolic function operation and multiplication operation, and is suitable for hardware junction. In addition, the algorithm can save most of the memory with respect to the traditional BP decoding algorithm. In terms of the structure of the algorithm, a novel information clamping function is proposed, which is simple and can be greatly improved. Error performance. For identity authentication module, we realized the body of the Toeplitz matrix based on LFSR The most core feature of the QKD system is its "absolute safety" property, and the identity authentication of the Toeplitz matrix based on the LFSR has the

"absolute safety" . In the aspect of module design and implementation, the structure of the algorithm is optimized, and the parallelism is improved to realize The essence of the identity authentication algorithm is a high-dimensional matrix multiplication, and a parallelization structure and a secondary parallelization structure are proposed from the operation of the optimization matrix multiplication row direction and the column direction, respectively, and the identity recognition of the height parallelization is realized. For the classical channel of high-speed data interaction, the USB 3.0 is selected as the high-speed data. The interface bus of the channel. The classical information of the QKD system to be transmitted in the data channel includes: the base-to-vector comparison information, the error correction letter, Interest, identity authentication code. We use the FX3 chip produced by the Cypress company as the protocol chip of USB 3.0, and apply the F 3 chip provided by the chip from F IFO operation mode. The corresponding firmware is designed. The hardware interface module is designed in the FPGA. The client program is designed on the PC. The actual test rate is up to 1.7. 9 Gbit/ s. The paper explores the post-processing technology of quantum key distribution system in quantum secret communication at the international front, which includes efficient and fast error correction algorithm, high data throughput identity authentication and high speed The classic channel of data exchange, the research results will directly improve the post-processing performance of QKD and successfully used in the Metro quantum communication test demonstration network, and will be applied in the following city in that inter-high-speed quantum communication network, the topic not only has the theoretical research value, but also And has practical application value. The main innovation points of this thesis are as follows:1. The rate of generation of different keys is finished. Two different real-time error correction schemes have been developed. For low-speed and medium-speed key generation rates, a fast and parallel design suitable for FPGA is completed based on Winnow error correction algorithm, and it is successfully applied to the Metro quantum communication test demonstration network; for low-speed and medium-speed key generation rate, On the basis of the high-speed and super-high-speed key generation rate, the fast error correction algorithm based on the LDPC error-correcting code is studied, and the hardware decoder based on the use of the serial decoding algorithm based on the QC-LDPC is completed, which can be adapted to the G. 2. In the QKD system of Hz transmission frequency,2. The research of real-time identity authentication technology is carried out aiming at the safety requirement of QKD, and the identity authentication scheme of the LFSR-based Toeplitz matrix which is suitable for FPGA implementation is realized, and the scheme has the characteristics of high "absolute safety" and high parallelism, in that high-speed quantum key distribution system, a large amount of the requirement of real-time interaction of the classical data and the research of the high-speed data channel are carried out, and a high-speed data channel based on the USB 3.0 and the gigabit network is completed,
【學(xué)位授予單位】:中國(guó)科學(xué)技術(shù)大學(xué)
【學(xué)位級(jí)別】:博士
【學(xué)位授予年份】:2014
【分類號(hào)】:TN918.4

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