【摘要】：在通信過程中常使用循環(huán)冗余編碼(CRC)進行差錯控制.CRC校驗可以通過軟件和硬件兩種方法實現(xiàn),在基于硬件的方法中,可用線性反饋移位寄存器(LFSR)實現(xiàn)CRC的校驗計算.以LFSR電路為基礎(chǔ),用FPGA實現(xiàn)了CRC校驗碼的串行和并行兩種算法,利用QuartusⅡ軟件設(shè)計了串行和并行算法的Verilog HDL代碼.Modelsim軟件的仿真驗證結(jié)果表明:基于LFSR設(shè)計的CRC串行算法具有實現(xiàn)原理簡單,耗時較長的特點;并行算法雖然過程復(fù)雜繁瑣,但效率高、耗時短.
[Abstract]:In the process of communication, the cyclic redundant coding (CRC) is often used for error control. CRC check can be realized by both software and hardware. In the hardware-based method, the linear feedback shift register (LFSR) can be used to realize the verification calculation of CRC. Based on LFSR circuit, the serial and parallel algorithms of CRC check code are implemented with FPGA. The simulation results show that the CRC serial algorithm based on LFSR has the characteristics of simple realization principle and long time consuming, while the parallel algorithm is complicated, and the simulation results show that the CRC serial algorithm based on LFSR has the characteristics of simple realization principle, long time consuming, and complex parallel algorithm, and the simulation results show that the parallel algorithm has the advantages of simple implementation principle and long time consuming. But the efficiency is high and the time is short.
【作者單位】： 蘭州交通大學(xué)光電技術(shù)與智能控制教育部重點實驗室;
【分類號】：TN911.2;TN791

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相關(guān)期刊論文 前3條

1 劉璐;武明亮;何俊強;;基于循環(huán)冗余校驗碼的差錯控制分析與實現(xiàn)[J];成都大學(xué)學(xué)報(自然科學(xué)版);2011年01期

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本文編號：2236341