本文選題：交叉極化干擾抵消器 + 載波同步��； 參考：《電子科技大學(xué)》2014年碩士論文

【摘要】：隨著無(wú)線通信業(yè)務(wù)的需求日益增加,無(wú)線移動(dòng)通信技術(shù)得到迅猛的發(fā)展,但是卻始終面臨著頻譜短缺這一嚴(yán)重問(wèn)題。無(wú)線通信系統(tǒng)中,提高頻譜利用率是研究重點(diǎn)之一。提高頻譜利用率,除了可以采用QAM調(diào)制技術(shù),也可以采用極化波復(fù)用技術(shù)。采用極化波復(fù)用技術(shù)時(shí),涉及到在信道中造成的交叉干擾,抵消交叉干擾會(huì)用到交叉極化干擾抵消器,本文討論了交叉極化干擾抵消器的結(jié)構(gòu)以及相關(guān)算法;采用QAM調(diào)制技術(shù)時(shí),解調(diào)一般采用相干解調(diào)技方式,而載波同步環(huán)路是相干解調(diào)不可或缺的環(huán)路之一。首先,本文介紹了交叉極化干擾抵消器的結(jié)構(gòu)與算法。本文主要介紹了三種算法,包括LMS算法、DD-LMS算法和CMA算法�；贒D-LMS和CMA算法各自的優(yōu)點(diǎn),討論了DD-LMS和CMA的切換算法。根據(jù)算法的數(shù)學(xué)推導(dǎo),用Simulink分別對(duì)DD-LMS、CMA和切換算法進(jìn)行建模,在信道中設(shè)定一定的交叉極化干擾,分析比較算法的性能。仿真后,用Verilog實(shí)現(xiàn)DD-LMS算法的交叉干擾抵消器,并在FPGA板上進(jìn)行了功能仿真和板級(jí)仿真,調(diào)試結(jié)果正確。其次,介紹了載波同步環(huán)路的原理以及算法。本文主要討論了載波同步環(huán)路的DD算法、極性判決法及二者的切換算法。根據(jù)算法的數(shù)學(xué)推導(dǎo),用Simulink分別對(duì)DD算法、極性判決法和切換算法進(jìn)行建模,在信道中設(shè)定一定的頻偏,分析比較算法的性能。仿真結(jié)果說(shuō)明,采用DD算法的載波同步環(huán)路收斂速度慢,但收斂后,相位誤差抖動(dòng)小,捕獲的頻偏穩(wěn)定;采用極性判決法的載波同步環(huán)路收斂速度快,但是收斂后相位誤差抖動(dòng)大,捕獲的頻偏抖動(dòng)也大;而切換算法具備二者的優(yōu)點(diǎn)。之后,用Verilog實(shí)現(xiàn)切換算法的載波同步環(huán)路,對(duì)載波同步環(huán)路單個(gè)模塊在FPGA板上進(jìn)行功能仿真和板級(jí)仿真,證明了采用切換算法的載波同步環(huán)路可以達(dá)到很好的糾正頻偏的效果。并對(duì)載波同步環(huán)路進(jìn)行系統(tǒng)聯(lián)合調(diào)試,調(diào)試結(jié)果正確。
[Abstract]:With the increasing demand of wireless communication services, the wireless mobile communication technology has been developing rapidly, but it is always faced with the serious problem of spectrum shortage. In wireless communication system, improving spectrum efficiency is one of the key research points. In order to improve spectral efficiency, not only QAM modulation technology can be used, but also polarization multiplexing technology can be used. When using polarization multiplexing technology, the cross-interference caused by the channel is involved, and the cross-polarization interference canceller is used to cancel the cross-polarization interference. In this paper, the structure of the cross-polarization interference canceller and the related algorithms are discussed. When QAM modulation technology is adopted, coherent demodulation is generally adopted, and carrier synchronization loop is one of the indispensable loops for coherent demodulation. Firstly, the structure and algorithm of cross polarization interference canceller are introduced. This paper mainly introduces three algorithms, including LMS algorithm, DD-LMS algorithm and CMA algorithm. Based on the advantages of DD-LMS and CMA, the switching algorithms of DD-LMS and CMA are discussed. According to the mathematical derivation of the algorithm, the DD-LMSCMA and the handoff algorithm are modeled by Simulink, and the cross-polarization interference is set up in the channel, and the performance of the algorithm is analyzed and compared. After simulation, the cross interference canceller of DD-LMS algorithm is realized by Verilog, and the functional simulation and board level simulation are carried out on the FPGA board, and the debugging results are correct. Secondly, the principle and algorithm of carrier synchronization loop are introduced. This paper mainly discusses DD algorithm, polarity decision method and switching algorithm of carrier synchronous loop. According to the mathematical derivation of the algorithm, the DD algorithm, the polarity decision method and the switching algorithm are modeled by Simulink, and a certain frequency offset is set up in the channel to analyze and compare the performance of the algorithm. The simulation results show that the convergence speed of the carrier synchronization loop using DD algorithm is slow, but after convergence, the phase error jitter is small, and the frequency offset of the acquisition is stable. However, the phase error jitter after convergence is large, and the frequency offset jitter captured is also large, and the switching algorithm has the advantages of both. After that, the carrier synchronization loop of the switching algorithm is implemented by Verilog, and the single module of the carrier synchronization loop is simulated on the FPGA board. It is proved that the carrier synchronization loop with the switching algorithm can correct the frequency offset very well. And carry on the system joint debugging to the carrier synchronous loop, the debugging result is correct.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：TN92
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本文編號(hào)：2091938