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LTE系統(tǒng)Turbo編譯碼器的設(shè)計(jì)與FPGA實(shí)現(xiàn)

發(fā)布時(shí)間:2018-06-05 18:38

  本文選題:Turbo碼 + LTE ; 參考:《西安電子科技大學(xué)》2014年碩士論文


【摘要】:Turbo碼以其逼近香農(nóng)極限的優(yōu)異性能受到了廣泛的關(guān)注。目前,已經(jīng)被成功應(yīng)用于第三代移動(dòng)通信、衛(wèi)星通信以及數(shù)字廣播電視等現(xiàn)代通信系統(tǒng)中。而正在部署的LTE、LTE-A系統(tǒng)也已經(jīng)將Turbo碼作為其信道編碼方案之一,以滿足高速業(yè)務(wù)發(fā)展的需求。論文重點(diǎn)研究了LTE系統(tǒng)中的低復(fù)雜度Turbo高速譯碼算法及其的硬件實(shí)現(xiàn)。論文首先介紹了Turbo基本編譯碼原理,分析比較了幾種常用的譯碼算法:MAP算法、LOG_MAP算法、MAX_LOG_MAP算法及其改進(jìn)算法。其次,為了有效降低譯碼時(shí)延,提高系統(tǒng)吞吐率,在算法方面,研究了HDA停止迭代判決準(zhǔn)則和基于三個(gè)比特同時(shí)處理的Radix-8算法;在譯碼結(jié)構(gòu)方面,研究了基于流水線的串行譯碼結(jié)構(gòu),重點(diǎn)分析了基于并行分塊處理的并行譯碼結(jié)構(gòu)以及針對(duì)子塊的流水線滑窗譯碼算法,給出了并行無(wú)沖突交織器的設(shè)計(jì)準(zhǔn)則及實(shí)例。論文最后給出了LTE系統(tǒng)中的Turbo碼FPGA設(shè)計(jì)方案。并基于Kintex-7系列芯片和Xilinx公司的ISE軟件開發(fā)平臺(tái),對(duì)LTE系統(tǒng)的Turbo編譯碼器進(jìn)行了設(shè)計(jì)實(shí)現(xiàn),經(jīng)過(guò)調(diào)試優(yōu)化后滿足系統(tǒng)要求。
[Abstract]:Turbo codes have attracted much attention for their excellent performance in approaching Shannon limit. At present, it has been successfully used in modern communication systems such as the third generation mobile communication, satellite communication and digital broadcast television. The LTE LTE-A system which is being deployed has also taken the Turbo code as one of its channel coding schemes to meet the needs of high-speed service development. This paper focuses on the low complexity Turbo high speed decoding algorithm in LTE system and its hardware implementation. Firstly, this paper introduces the basic encoding and decoding principle of Turbo, analyzes and compares several commonly used decoding algorithms: map algorithm and LOGSTAP algorithm and their improved algorithms. Secondly, in order to effectively reduce the decoding delay and improve the throughput of the system, the HDA stopping iterative decision criterion and the Radix-8 algorithm based on three bits processing are studied in the aspect of decoding structure. The serial decoding structure based on pipeline is studied. The parallel decoding structure based on parallel block processing and the pipelined sliding window decoding algorithm for sub-blocks are analyzed. The design criteria and examples of parallel conflict free Interleaver are given. Finally, the design scheme of Turbo code FPGA in LTE system is given. Based on Kintex-7 chips and ISE software development platform of Xilinx Company, the Turbo encoder and decoder of LTE system are designed and implemented. After debugging and optimization, the system requirements are satisfied.
【學(xué)位授予單位】:西安電子科技大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2014
【分類號(hào)】:TN911.22;TN791

【引證文獻(xiàn)】

相關(guān)會(huì)議論文 前1條

1 儀魯男;盛煜;路瑋;呂召彪;;LTE技術(shù)演進(jìn)及網(wǎng)絡(luò)部署策略研究[A];2011全國(guó)無(wú)線及移動(dòng)通信學(xué)術(shù)大會(huì)論文集[C];2011年



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