基于FPGA的LDPC碼譯碼器研究及實現
發(fā)布時間:2018-05-19 19:02
本文選題:低密度奇偶校驗碼 + 對數似然比置信傳播譯碼算法 ; 參考:《浙江工業(yè)大學》2014年碩士論文
【摘要】:通信系統一直被要求高質和高效,因此信道編碼作為數字通信系統中不可或缺的一部分便越來越受到人們的重視。在上世紀60年代被Gallager發(fā)現的LDPC碼正是信道編碼中非常優(yōu)異的一種碼字。LDPC碼優(yōu)異的性能幾乎接近于香農限,在信息傳輸研究中有著良好的應用前景,LDPC碼譯碼器的硬件實現也是現如今熱點研究的問題之一。本文在對LDPC碼的基本概念做出系統介紹的基礎上,介紹了LDPC碼中幾種不同的構造方法,并對不同的構造碼字和碼長進行了性能分析,確定選用基于IEEE 802.16e標準的QC-LDPC碼。文中還介紹了幾種不同的LDPC碼譯碼算法,通過MATLAB仿真,在對性能和實現復雜度進行比較后,最終選定LLR BP譯碼算法進行后續(xù)的研究和硬件實現。然后針對選定的LLR BP譯碼算法和802.16e標準的QC-LDPC碼,通過MATLAB工具進行性能仿真,在AWGN信道下,在量化范圍、量化比特數、量化方式選擇這三方面分別對輸入信號和中間變量進行了性能仿真與對比,最后經過分析比較,提出了一種新型和有效的量化方案。最后,以FPGA為平臺,設計了一種基于802.16e標準的QC-LDPC譯碼器,使用開發(fā)軟件QuartusⅡ 9.0,運用硬件描述語言Verilog HDL對譯碼器各個模塊進行劃分,描述和綜合實現,并用ModelSim軟件對各個模塊和總體的譯碼器進行了測試和仿真,通過仿真圖的分析比較,確定個模塊功能的正確性,并進行了一定的性能優(yōu)化。
[Abstract]:Since communication systems are always required to be of high quality and efficiency, channel coding, as an indispensable part of digital communication systems, has attracted more and more attention. The LDPC code discovered by Gallager in the 1960s is just one of the most excellent codewords in channel coding. The excellent performance of LDPC code is almost close to the Shannon limit. The hardware implementation of LDPC decoder is one of the hot issues in the research of information transmission. Based on the systematic introduction of the basic concepts of LDPC codes, this paper introduces several different construction methods of LDPC codes, analyzes the performance of different construction codewords and code lengths, and determines the selection of QC-LDPC codes based on IEEE 802.16e standard. Several different decoding algorithms of LDPC codes are also introduced in this paper. After comparing the performance and implementation complexity of LLR BP decoding algorithm through MATLAB simulation, the LLR BP decoding algorithm is selected for subsequent research and hardware implementation. Then, for the selected LLR BP decoding algorithm and 802.16e standard QC-LDPC code, the performance simulation is carried out by MATLAB tools. In the AWGN channel, the quantization bit number is quantized in the range of quantization. The performance of the input signal and the intermediate variable is simulated and compared in the three aspects of quantization method. Finally, a new and effective quantization scheme is proposed after analysis and comparison. Finally, a QC-LDPC decoder based on 802.16e is designed on the platform of FPGA. Using the development software Quartus 鈪,
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