本文關鍵詞： 加速度計 全數(shù)字閉環(huán) PID控制 二元調寬脈沖　出處：《長沙理工大學》2014年碩士論文　論文類型：學位論文

【摘要】：石英撓性加速度計是慣性導航系統(tǒng)組成的關鍵器件之一,其應用范圍涉及航空、航天、航海以及一些民用領域。加速度計的讀出精度決定了慣性導航系統(tǒng)的導航精度,傳統(tǒng)的加速度計讀出電路通過模擬電路實現(xiàn),模擬電路結構復雜、抗干擾性低缺特點制約了加速度計讀出電路的精度和穩(wěn)定性。隨著數(shù)字化處理的飛速發(fā)展,數(shù)字電路逐步具有高穩(wěn)定性以及高抗干擾性等特性,加速度計的數(shù)字化讀出成了研究熱點,本課題對加速度計的全數(shù)字化讀出方式進行了研究。通過對傳統(tǒng)的模擬讀出電路方案和模數(shù)結合讀出方案的對比與分析,確定了基于FPGA的全數(shù)字加速度計讀出方案,整個全數(shù)字讀出電路包含三個模塊電路：差動電容檢測電路、數(shù)字控制電路和力矩器控制電路。采用多方案對比設計,從分辨率、讀出精度等角度對比分析了兩種差動電容數(shù)字檢測電路,選用了頻率法檢測電路實現(xiàn)電容差的檢測；采用了數(shù)字PID控制算法,實現(xiàn)了加速度計讀出電路的閉環(huán)自動控制：從加矩功率、分辨率、零偏穩(wěn)定性、刻度因素及線性度和動態(tài)響應等方面對多種PWM數(shù)字脈沖力矩器加矩方式進行了對比與分析,確定了二元調寬脈沖的加矩方式實現(xiàn)對加速度計的加矩；設計了FPGA下位機與計算機上位機連接,通過基于VB的可視界面實現(xiàn)了加速度計數(shù)據讀出的顯示、存儲以及部分控制,用于對讀出電路的測試。對整個加速度計讀出電路進行了階躍、動態(tài)、靜態(tài)等測試,驗證了石英撓性加速度計的全數(shù)字閉環(huán)讀出電路的成功實現(xiàn),可以測得讀出電路的讀出標準偏差為1.5×10-5g,精度為10-4g的加速度值。
[Abstract]:Quartz flexible accelerometer is one of the key components of inertial navigation system. Its application scope involves aviation, aerospace, navigation and some civil fields. The readout accuracy of accelerometer determines the navigation accuracy of inertial navigation system. The traditional accelerometer readout circuit is realized by analog circuit. The structure of analog circuit is complex and the characteristic of low anti-interference restricts the precision and stability of accelerometer readout circuit. Digital circuits gradually have the characteristics of high stability and high anti-interference. The digital readout of accelerometers has become a research hotspot. The whole digital readout method of accelerometer is studied in this paper. By comparing and analyzing the traditional analog readout circuit scheme and the analog-to-digital readout scheme, the full digital accelerometer readout scheme based on FPGA is determined. The whole digital readout circuit consists of three modules: differential capacitance detection circuit, digital control circuit and torque control circuit. In this paper, two kinds of differential capacitance digital detection circuits are compared and analyzed from the angle of readout precision, frequency method is used to detect capacitance difference, and digital PID control algorithm is used. The closed loop automatic control of accelerometer readout circuit is realized. Several PWM digital pulse torque adding methods are compared and analyzed from the aspects of moment power, resolution, zero bias stability, calibration factor, linearity and dynamic response, etc. The method of adding moment to accelerometer is determined, and the connection between FPGA lower computer and computer is designed, and the display, storage and partial control of accelerometer data are realized by visual interface based on VB. It is used to test the readout circuit. The step, dynamic and static test of the whole accelerometer readout circuit is carried out, which verifies the successful realization of the full digital closed loop readout circuit of the quartz flexible accelerometer. The readout standard deviation of the readout circuit is 1.5 脳 10 ~ (-5) g and the precision is 10 ~ (-4) g.
【學位授予單位】：長沙理工大學
【學位級別】：碩士
【學位授予年份】：2014
【分類號】：TN96

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本文編號：1506040