【摘要】：隨著電子技術(shù)的快速發(fā)展,由分立的中、小規(guī)模的電路搭建傳統(tǒng)方法已被大規(guī)模集成電路現(xiàn)代電子技術(shù)所取代,未來電子工程師進(jìn)行電路設(shè)計(jì)時(shí)將不必從基本的單元電路做起,而是只需將注意力集中到系統(tǒng)設(shè)計(jì)上。如何將現(xiàn)代電子設(shè)計(jì)技術(shù)融入到基本數(shù)字電路教學(xué)中,創(chuàng)造一種將FPGA開發(fā)實(shí)踐與數(shù)字電路的學(xué)習(xí)相結(jié)合的新方法?本課題為此構(gòu)建一塊區(qū)別于市面上多基于工程應(yīng)用而缺乏基礎(chǔ)知識學(xué)習(xí)的FPGA綜合實(shí)驗(yàn)平臺(tái),在此實(shí)驗(yàn)平臺(tái)上使用者既可配合平臺(tái)完成基于FPGA的模塊化設(shè)計(jì)思想的數(shù)字集成電路基礎(chǔ)知識,又可進(jìn)一步開拓基于SOPC思想的現(xiàn)代數(shù)字系統(tǒng)設(shè)計(jì)。探索一條將現(xiàn)代EDA技術(shù)融入傳統(tǒng)電子技術(shù)基礎(chǔ)教學(xué)中的新思路。設(shè)計(jì)FPGA綜合數(shù)字實(shí)驗(yàn)平臺(tái)的目的是解決傳統(tǒng)數(shù)字電路實(shí)驗(yàn)箱中存在的以下缺陷:連線與器件容易順壞;大部分?jǐn)?shù)字電路實(shí)驗(yàn)以驗(yàn)證性實(shí)驗(yàn)為主,缺乏創(chuàng)新性和開發(fā)性,不利于開發(fā)學(xué)生創(chuàng)造性思維。文中從FPGA的設(shè)計(jì)基礎(chǔ)、開發(fā)語言與工具、硬件電路系統(tǒng)設(shè)計(jì)、基于數(shù)字電路實(shí)驗(yàn)的模塊化設(shè)計(jì)案例、基于SOPC的數(shù)字綜合實(shí)驗(yàn)開發(fā)等方面介紹該平臺(tái)的設(shè)計(jì)過程與應(yīng)用開發(fā)。在實(shí)際應(yīng)用中,該實(shí)驗(yàn)平臺(tái)不僅可以完成基本門電路、計(jì)數(shù)器等數(shù)字電路的驗(yàn)證性實(shí)驗(yàn)要求,還可以進(jìn)行數(shù)字系統(tǒng)創(chuàng)新性設(shè)計(jì),如電子時(shí)鐘、基于NIOS II軟核處理器的數(shù)碼管動(dòng)態(tài)顯示設(shè)計(jì)等,基本可以滿足學(xué)生在此平臺(tái)進(jìn)行基礎(chǔ)學(xué)習(xí)和開發(fā)性設(shè)計(jì)�；谠撈脚_(tái)的每個(gè)實(shí)驗(yàn)都從工作原理、語言描述與仿真、下載調(diào)試、演示性設(shè)計(jì)、拓展開發(fā)等方面展示FPGA綜合數(shù)字實(shí)驗(yàn)平臺(tái)的特點(diǎn)與優(yōu)勢。
[Abstract]:With the rapid development of electronic technology, the traditional method of small scale circuit construction has been replaced by modern electronic technology of large scale integrated circuit (LSI) by discrete medium and small scale circuits. In the future, electronic engineers will not have to start with basic unit circuits when designing circuits. Instead, just focus on the design of the system. How to integrate the modern electronic design technology into the teaching of basic digital circuit and create a new method which combines the practice of FPGA development with the study of digital circuit? For this reason, this paper constructs a comprehensive experimental platform of FPGA, which is different from many engineering applications in the market and lacks basic knowledge learning. On this experimental platform, the users can cooperate with the platform to complete the basic knowledge of digital integrated circuit based on the modular design idea of FPGA, and to further develop the modern digital system design based on SOPC. To explore a new way to integrate modern EDA technology into the basic teaching of traditional electronic technology. The purpose of designing the FPGA integrated digital experimental platform is to solve the following defects in the traditional digital circuit experiment box: the connection and the device are easy to smooth and break; Most digital circuit experiments are mainly confirmatory experiments, which are lack of innovation and development, which is not conducive to the development of students' creative thinking. This paper introduces the design process and application development of FPGA platform from the aspects of design basis, development language and tools, hardware circuit system design, modular design case based on digital circuit experiment, digital synthesis experiment development based on SOPC, etc. In practical application, the experimental platform can not only fulfill the verification experiment requirements of basic gate circuit, counter and other digital circuits, but also carry out innovative design of digital system, such as electronic clock, etc. The design of digital tube dynamic display based on NIOS II soft core processor can basically satisfy the students' basic learning and development design in this platform. Each experiment based on this platform shows the characteristics and advantages of FPGA integrated digital experimental platform from the aspects of working principle, language description and simulation, downloading and debugging, demonstrating design, expanding development and so on.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2016
【分類號】：TN79;TP311.52

【參考文獻(xiàn)】

相關(guān)期刊論文 前10條

1 胥嘉佳;黃克平;;一種基于FPGA最小系統(tǒng)的PROM擴(kuò)展方法[J];電子科技;2013年04期

2 宋奮韜;王夢瑩;付志遠(yuǎn);;FPGA發(fā)展概論[J];科技信息;2012年23期

3 劉華;劉素娟;葉翠紅;;堿性蝕刻廢液制備硫酸銅的研究[J];化學(xué)工程與裝備;2011年05期

4 傅麗麗;曾國蓀;;N體問題的FPGA求解和設(shè)計(jì)方法[J];計(jì)算機(jī)科學(xué);2010年11期

5 徐志省;;基于FPGA技術(shù)的自動(dòng)化控制系統(tǒng)[J];科技資訊;2010年21期

6 楊海鋼;孫嘉斌;王慰;;FPGA器件設(shè)計(jì)技術(shù)發(fā)展綜述[J];電子與信息學(xué)報(bào);2010年03期

7 萬蓉;王霖;林訓(xùn)超;畢喜彥;;基于SOPC的空調(diào)智能溫度控制器的設(shè)計(jì)[J];微計(jì)算機(jī)信息;2008年07期

8 王維博,吳自恒;用FPGA/CPLD實(shí)現(xiàn)EDA設(shè)計(jì)[J];四川工業(yè)學(xué)院學(xué)報(bào);2004年02期

9 劉全盛;電子技術(shù)重心轉(zhuǎn)移[J];哈爾濱理工大學(xué)學(xué)報(bào);2003年02期

10 譚智力 ,朱冬姣;基于TPS54610的同步降壓DC/DC電源設(shè)計(jì)[J];國外電子元器件;2003年03期

相關(guān)碩士學(xué)位論文 前8條

1 紀(jì)永成;FPGA開發(fā)板設(shè)計(jì)與研究[D];吉林大學(xué);2011年

2 楊佳椿;基于MEMS技術(shù)的壓電噴頭研究[D];中國地質(zhì)大學(xué)（北京）;2011年

3 郭政陽;基于FPGA的高速圖像采集與處理[D];江南大學(xué);2011年

4 周文斐;基于FPGA的聲源定位[D];天津大學(xué);2010年

5 胡小琴;一種FPGA嵌入式塊RAM設(shè)計(jì)[D];電子科技大學(xué);2010年

6 鄭玉;USB-ARINC429總線通信接口的設(shè)計(jì)[D];電子科技大學(xué);2009年

7 朱赤駒;FPGA中CLB電路的設(shè)計(jì)研究[D];電子科技大學(xué);2009年

8 楊學(xué)敏;CTP中基于USB2.0和SOPC的圖像傳輸[D];長春理工大學(xué);2008年

，

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