基于DSP與FPGA的運(yùn)動(dòng)目標(biāo)跟蹤系統(tǒng)設(shè)計(jì)
發(fā)布時(shí)間:2018-04-02 09:36
本文選題:運(yùn)動(dòng)目標(biāo)跟蹤 切入點(diǎn):并行計(jì)算 出處:《哈爾濱工程大學(xué)》2016年碩士論文
【摘要】:計(jì)算機(jī)視覺(jué)技術(shù)作為自動(dòng)控制系統(tǒng)的信息獲取方式是當(dāng)前自動(dòng)化技術(shù)領(lǐng)域的一個(gè)熱點(diǎn),其主要原因是視覺(jué)可以承載更多的信息。但是,視覺(jué)信息復(fù)雜、數(shù)據(jù)量大、有效特征提取困難,這給計(jì)算機(jī)視覺(jué)技術(shù)的研究帶來(lái)極大困難,成為目前計(jì)算機(jī)視覺(jué)研究的一個(gè)難點(diǎn)。目前,在PC機(jī)上實(shí)現(xiàn)基于視覺(jué)的跟蹤技術(shù)已經(jīng)很成熟,但是,由PC機(jī)或工作站等實(shí)現(xiàn)的視覺(jué)系統(tǒng)體積比較大,難以滿足靈活性要求。而基于嵌入式的視覺(jué)系統(tǒng)可以彌補(bǔ)以上不足,因此越來(lái)越受歡迎。基于單一處理器實(shí)現(xiàn)的嵌入式算法比較多,而多處理器算法的大部分實(shí)現(xiàn)是利用協(xié)處理器架構(gòu)。本文以DSP (數(shù)字信號(hào)處理器)與FPGA (現(xiàn)場(chǎng)可編程門(mén)陣列)相互協(xié)同為基礎(chǔ),搭建了一個(gè)自動(dòng)跟蹤系統(tǒng),實(shí)現(xiàn)攝像頭對(duì)運(yùn)動(dòng)目標(biāo)的隨動(dòng)跟蹤。一方面,鑒于視頻處理中實(shí)時(shí)跟蹤涉及大量的并行運(yùn)算,適合用FPGA來(lái)實(shí)現(xiàn)圖像的實(shí)時(shí)濾波、平滑等操作,同時(shí)在視頻流的采集和處理過(guò)程中,存儲(chǔ)圖像到SDRAM時(shí)運(yùn)用FPGA操作存儲(chǔ)器速度更快。另一方面,目標(biāo)跟蹤涉及到大量的復(fù)雜運(yùn)算和迭代算法,在DSP上實(shí)現(xiàn)更為容易。本文結(jié)合二者的優(yōu)點(diǎn),設(shè)計(jì)用不同的處理器分別處理不同的操作,并行運(yùn)行相互通信。在FPGA上實(shí)現(xiàn)顏色空間的轉(zhuǎn)換、混合高斯模型、形態(tài)學(xué)二值開(kāi)運(yùn)算、中值濾波和線性濾波等圖像處理算法和ⅡC時(shí)序、UART通訊接口、MCBSP、SDRAM控制器、BT656視頻解碼等接口;在DSP上實(shí)現(xiàn)雙分辨率的MeanShift算法用于運(yùn)動(dòng)目標(biāo)的跟蹤,并與FPGA進(jìn)行通信。為了實(shí)現(xiàn)攝像頭對(duì)運(yùn)動(dòng)目標(biāo)的實(shí)時(shí)瞄準(zhǔn),在ATmega16單片機(jī)上實(shí)現(xiàn)了 PID算法以控制電機(jī)的運(yùn)動(dòng)。為了加快系統(tǒng)開(kāi)發(fā)速度,本文首先在PC上論證并設(shè)計(jì)適合在FPGA與DSP上運(yùn)行的算法結(jié)構(gòu),然后將算法映射到本文選定的硬件結(jié)構(gòu)上并通過(guò)與PC機(jī)通信以調(diào)試系統(tǒng)。實(shí)驗(yàn)結(jié)果表明,本系統(tǒng)對(duì)運(yùn)動(dòng)目標(biāo)的隨動(dòng)跟蹤具有快速和準(zhǔn)確的特點(diǎn)。
[Abstract]:Computer vision technology is a hot spot in the field of automation technology as the information acquisition method of automatic control system. The main reason is that vision can carry more information, but the visual information is complex and the amount of data is large. Effective feature extraction is difficult, which brings great difficulty to the research of computer vision technology, and becomes a difficulty in computer vision research. At present, it is very mature to realize the tracking technology based on vision on PC, but, The visual system realized by PC or workstation is large in volume and difficult to meet the requirement of flexibility. However, the vision system based on embedded system can make up for the above deficiency. So it's getting more and more popular. There are more embedded algorithms based on a single processor. Based on the cooperation between DSP (Digital signal processor) and FPGA (Field Programmable Gate Array), an automatic tracking system is built. On the one hand, because the real-time tracking of video processing involves a large number of parallel operations, it is suitable to use FPGA to realize real-time image filtering, smoothing and other operations. At the same time, in the process of video stream acquisition and processing, it is faster to use FPGA to store images to SDRAM. On the other hand, target tracking involves a large number of complex operations and iterative algorithms. It is easier to implement on DSP. In this paper, different processors are designed to deal with different operations with different processors, running parallel communication with each other. Color space conversion, mixed Gao Si model, morphological binary open operation are realized on FPGA. The image processing algorithms such as median filter and linear filter, and the interface of 鈪,
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