一種帶參考注入信號(hào)的TIADC時(shí)間失配校準(zhǔn)算法
發(fā)布時(shí)間:2018-10-15 19:31
【摘要】:提出了一種帶參考注入信號(hào)的校準(zhǔn)算法,用于校準(zhǔn)時(shí)間交織模數(shù)轉(zhuǎn)換器(Time-Interleaved Analog-to-Digital Converter,TIADC)的時(shí)間失配誤差。該算法引入?yún)⒖甲⑷胄盘?hào),參考注入信號(hào)通過(guò)采樣保持電路(sample hold circuit,S/H)后,利用TIADC的各子通道時(shí)鐘依次控制S/H,對(duì)其輸出后的值進(jìn)行運(yùn)算獲得時(shí)間誤差,再將時(shí)間誤差反饋回多相時(shí)鐘產(chǎn)生器,利用可變延遲線實(shí)現(xiàn)時(shí)間失配的補(bǔ)償。該算法運(yùn)算簡(jiǎn)單,消耗的硬件資源低,對(duì)輸入信號(hào)沒(méi)有限制,可以擴(kuò)展到任意通道。算法應(yīng)用于一個(gè)4通道12 bits的TIADC,當(dāng)輸入信號(hào)的歸一化頻率f_(in)/f_s=0.485 0,設(shè)定的最大誤差為1.0% T_s時(shí),MATLAB仿真結(jié)果表明,經(jīng)過(guò)本算法校準(zhǔn)后的SFDR從31.009 4 dB提高到了95.627 0 dB,SNDR從31.074 9 dB提高到了73.480 5 dB,證明了該校準(zhǔn)方案的有效性。
[Abstract]:A calibration algorithm with reference injection signal is proposed to calibrate the time mismatch of time Interleaved Analog-to-Digital Converter (Time-Interleaved Analog-to-Digital Converter,TIADC). The reference injection signal is introduced in the algorithm. After the reference injection signal is sampled and held by (sample hold circuit,S/H), the clock of each sub-channel of TIADC is used to control S / H in turn, and the time error is obtained by calculating the output value. Then the time error is fed back to the polyphase clock generator and the time mismatch is compensated by the variable delay line. The algorithm is simple in operation, low in hardware resources and unlimited in input signal, and can be extended to any channel. The algorithm is applied to a 4-channel 12 bits TIADC, when the input frequency f _ (in) / f_s=0.485 0 is normalized, and the maximum error is 1.0% T _ s. The simulation results of MATLAB show that, The effectiveness of the proposed calibration scheme is proved by the improved SFDR from 31.009 4 dB to 95.627 0 dB,SNDR from 31.074 9 dB to 73.480 5 dB,.
【作者單位】: 合肥工業(yè)大學(xué)微電子設(shè)計(jì)研究所;
【分類(lèi)號(hào)】:TN792
本文編號(hào):2273604
[Abstract]:A calibration algorithm with reference injection signal is proposed to calibrate the time mismatch of time Interleaved Analog-to-Digital Converter (Time-Interleaved Analog-to-Digital Converter,TIADC). The reference injection signal is introduced in the algorithm. After the reference injection signal is sampled and held by (sample hold circuit,S/H), the clock of each sub-channel of TIADC is used to control S / H in turn, and the time error is obtained by calculating the output value. Then the time error is fed back to the polyphase clock generator and the time mismatch is compensated by the variable delay line. The algorithm is simple in operation, low in hardware resources and unlimited in input signal, and can be extended to any channel. The algorithm is applied to a 4-channel 12 bits TIADC, when the input frequency f _ (in) / f_s=0.485 0 is normalized, and the maximum error is 1.0% T _ s. The simulation results of MATLAB show that, The effectiveness of the proposed calibration scheme is proved by the improved SFDR from 31.009 4 dB to 95.627 0 dB,SNDR from 31.074 9 dB to 73.480 5 dB,.
【作者單位】: 合肥工業(yè)大學(xué)微電子設(shè)計(jì)研究所;
【分類(lèi)號(hào)】:TN792
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1 胡靜;;乘性噪聲和注入信號(hào)對(duì)單模激光一級(jí)相變類(lèi)比的影響[J];安慶師范學(xué)院學(xué)報(bào)(自然科學(xué)版);2011年02期
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