發(fā)布時(shí)間：2018-04-24 11:57

  本文選題：神經(jīng)網(wǎng)絡(luò) + 模擬電路�。� 參考：《湘潭大學(xué)》2015年碩士論文

【摘要】：神經(jīng)網(wǎng)絡(luò)是模擬人腦基本特性的智能系統(tǒng),也是一門信息處理的科學(xué)。神經(jīng)網(wǎng)絡(luò)具有自適應(yīng)學(xué)習(xí)、非線性映射、分布并行處理等特點(diǎn)。神經(jīng)網(wǎng)絡(luò)從單個(gè)神經(jīng)元的模擬,到最終模擬大腦的信息處理功能。神經(jīng)網(wǎng)絡(luò)應(yīng)用非常廣泛,目前主要運(yùn)用于非線性系統(tǒng)、網(wǎng)絡(luò)故障、航空航天、智能機(jī)器人等領(lǐng)域。對于神經(jīng)網(wǎng)絡(luò)的研究主要分為三部分:理論研究、應(yīng)用研究和實(shí)現(xiàn)技術(shù)研究。而實(shí)現(xiàn)技術(shù)上,主要有兩種實(shí)現(xiàn)方法:軟件實(shí)現(xiàn)和硬件實(shí)現(xiàn)。用軟件實(shí)現(xiàn)神經(jīng)網(wǎng)絡(luò),具有處理速度、并行程度低等缺點(diǎn),這很難滿足神經(jīng)網(wǎng)絡(luò)信息處理的實(shí)時(shí)性的要求。用硬件實(shí)現(xiàn)神經(jīng)網(wǎng)絡(luò)能體現(xiàn)網(wǎng)絡(luò)的快速性、并行計(jì)算,且能實(shí)現(xiàn)大規(guī)模的信號處理,這在復(fù)雜的數(shù)據(jù)處理場合中是非常有利的。因此,硬件實(shí)現(xiàn)是神經(jīng)網(wǎng)絡(luò)發(fā)展的必然趨勢。硬件實(shí)現(xiàn)方法中,基于模擬CMOS電路實(shí)現(xiàn)神經(jīng)網(wǎng)絡(luò)電路具有結(jié)構(gòu)簡單、集成速度快、占用芯片面積小、集成度高、功耗低等特點(diǎn),因此本文研究采用模擬CMOS集成電路設(shè)計(jì)神經(jīng)網(wǎng)絡(luò)。神經(jīng)網(wǎng)絡(luò)模型中具有代表性的有:誤差反向傳播BP網(wǎng)絡(luò)、徑向基函數(shù)RBF網(wǎng)絡(luò)、自組織網(wǎng)絡(luò)、感知器、反饋Hopfield網(wǎng)絡(luò)、小腦模型CMAC網(wǎng)絡(luò)、模糊神經(jīng)網(wǎng)絡(luò)等。目前,已經(jīng)用硬件實(shí)現(xiàn)了的神經(jīng)網(wǎng)絡(luò)有:BP網(wǎng)絡(luò)、RBF網(wǎng)絡(luò)、感知器等,而在其他的網(wǎng)絡(luò)模型的硬件實(shí)現(xiàn)方案甚少。基于研究神經(jīng)網(wǎng)絡(luò)的全面性,本文主要研究用模擬CMOS電路實(shí)現(xiàn)自組織競爭神經(jīng)和模糊神經(jīng)網(wǎng)絡(luò),圍繞這兩種神經(jīng)網(wǎng)絡(luò),做了如下相關(guān)工作:(1)針對神經(jīng)網(wǎng)絡(luò)的神經(jīng)元模型中權(quán)值不可調(diào)的缺點(diǎn),設(shè)計(jì)了線性可調(diào)運(yùn)算跨導(dǎo)放大器和電流乘法器電路作為突觸電路,通過改變外部電流實(shí)現(xiàn)權(quán)值可調(diào)功能,且設(shè)計(jì)的電路結(jié)構(gòu)簡單,線性度高。以此能作為基本單元應(yīng)用于神經(jīng)元電路中。(2)基于自組織競爭神經(jīng)網(wǎng)絡(luò)中競爭層算法難以實(shí)現(xiàn)的問題,設(shè)計(jì)了一種電流模式的最值電路模擬實(shí)現(xiàn)競爭算法,通過比較電流的大小達(dá)到競爭目的。該電路實(shí)現(xiàn)簡單、模擬程度高、便于集成,與輸入層結(jié)合能實(shí)現(xiàn)自組織競爭神經(jīng)網(wǎng)絡(luò)。(3)針對模糊神經(jīng)網(wǎng)絡(luò)的單元電路結(jié)構(gòu)復(fù)雜且精度低的問題,本文對高斯函數(shù)電路、求小電路、去模糊電路的結(jié)構(gòu)進(jìn)行優(yōu)化設(shè)計(jì),從整體上提高模糊神經(jīng)網(wǎng)絡(luò)的精度和高速性。最后將設(shè)計(jì)的模糊神經(jīng)網(wǎng)絡(luò)用于實(shí)現(xiàn)一個(gè)非線性函數(shù)的逼近,并通過了仿真與驗(yàn)證。
[Abstract]:Neural network is an intelligent system which simulates the basic characteristics of human brain and is also a science of information processing. Neural network has the characteristics of adaptive learning, nonlinear mapping, distributed parallel processing and so on. Neural networks range from the simulation of a single neuron to the eventual simulation of the brain's information processing function. Neural network is widely used in nonlinear systems, network failures, aerospace, intelligent robots and other fields. The research of neural network is divided into three parts: theoretical research, application research and implementation technology research. On the other hand, there are two main methods: software implementation and hardware implementation. The realization of neural network by software has the disadvantages of low processing speed and low parallelism, which is difficult to meet the real-time requirement of neural network information processing. The implementation of neural network by hardware can reflect the rapidity of the network, parallel computing, and the realization of large-scale signal processing, which is very advantageous in the complex data processing situation. Therefore, hardware implementation is the inevitable trend of neural network development. In the hardware realization method, the neural network circuit based on analog CMOS circuit has the characteristics of simple structure, high integration speed, small chip area, high integration level and low power consumption. Therefore, this paper studies the use of analog CMOS integrated circuit to design neural networks. Some typical neural network models are error back-propagation BP network, radial basis function (RBF) network, self-organizing network, perceptron, feedback Hopfield network, cerebellar model CMAC network, fuzzy neural network and so on. At present, the neural networks that have been implemented by hardware include: BP network, RBF network, perceptron and so on, but there are few hardware implementation schemes in other network models. Based on the comprehensive study of neural networks, this paper mainly studies the implementation of self-organizing competitive neural networks and fuzzy neural networks using analog CMOS circuits, and focuses on these two kinds of neural networks. The following work is done: (1) aiming at the disadvantage of the unadjustable weight in the neural network model, a linear adjustable operational transconductance amplifier and a current multiplier circuit are designed as synaptic circuits to realize the adjustable weight function by changing the external current. The designed circuit has simple structure and high linearity. This method can be used as a basic unit in neuron circuits. (2) based on the problem that it is difficult to implement the competition layer algorithm in the self-organizing competitive neural network, a current-mode circuit simulation algorithm is designed to realize the competition. By comparing the magnitude of the current to achieve the goal of competition. The circuit is simple, high analog, easy to integrate, and can be combined with input layer to realize self-organizing competitive neural network. (3) aiming at the problem of complex structure and low precision of the cell circuit of fuzzy neural network, this paper deals with Gao Si function circuit. In order to improve the precision and high speed of the fuzzy neural network, the structure of the small circuit and the de-fuzzy circuit are optimized. Finally, the designed fuzzy neural network is used to realize the approximation of a nonlinear function, and the simulation and verification are carried out.
【學(xué)位授予單位】：湘潭大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2015
【分類號】：TN710

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本文編號：1796526