投影光刻機(jī)中的線陣CCD高速檢焦技術(shù)研究
本文關(guān)鍵詞:投影光刻機(jī)中的線陣CCD高速檢焦技術(shù)研究 出處:《中國(guó)科學(xué)院研究生院(光電技術(shù)研究所)》2015年碩士論文 論文類型:學(xué)位論文
更多相關(guān)文章: 光學(xué)投影光刻 檢焦系統(tǒng) 線陣CCD Camera Link 圖像細(xì)分算法
【摘要】:隨著光學(xué)投影光刻分辨力的不斷提高,投影物鏡的焦深在逐漸縮短,通常在百納米級(jí)。為充分利用物鏡有限的焦深,高精度的檢焦調(diào)焦技術(shù)成為研究熱門。而投影光刻機(jī)進(jìn)入到步進(jìn)掃描時(shí)代以及硅片尺寸的不斷增大,使得檢焦調(diào)焦系統(tǒng)在保證精度要求的情況下,需要同時(shí)兼顧檢焦調(diào)焦的實(shí)時(shí)性和頻率。現(xiàn)有的粗檢焦技術(shù)多為光度檢焦技術(shù),采用四象限探測(cè)器或者面陣CCD采集攜帶有硅片離焦量信息的光強(qiáng)信號(hào)。中科院光電所的TYG2000/T型步進(jìn)投影光刻機(jī)采用光度檢焦技術(shù),在計(jì)算機(jī)上進(jìn)行圖像處理完成檢焦,最后通過串口控制工件臺(tái)對(duì)離焦量進(jìn)行補(bǔ)償。此方法在上位機(jī)完成閉環(huán),傳輸環(huán)節(jié)冗余,檢焦頻率低,在工件臺(tái)步進(jìn)的過程中不能進(jìn)行實(shí)時(shí)的檢焦調(diào)焦,產(chǎn)率不高。鑒于此,本文提出了一種用線陣CCD采集圖像,以FPGA為處理器在下位機(jī)完成閉環(huán)的檢焦方案。此方案利用線陣CCD的高速性和FPGA的并行性,結(jié)合亞像素像點(diǎn)定位算法,在保證檢焦精度優(yōu)于1μm、量程大于200μm的條件下,較大幅度提高了檢焦頻率,在工件臺(tái)步進(jìn)的過程中實(shí)現(xiàn)了實(shí)時(shí)檢焦,降低了成本,減小了功耗。本文詳細(xì)介紹線陣CCD下位機(jī)閉環(huán)高速檢焦系統(tǒng)的設(shè)計(jì)、實(shí)驗(yàn)過程。在第一章介紹了光刻技術(shù)及檢焦技術(shù)的研究現(xiàn)狀與發(fā)展方向;第二章詳細(xì)介紹了CCD和Camera Link協(xié)議的相關(guān)知識(shí),在此基礎(chǔ)上,展開了系統(tǒng)整體方案的設(shè)計(jì)和優(yōu)化;第三章分享了電路板的硬件設(shè)計(jì)過程及經(jīng)驗(yàn)教訓(xùn);第四章分析了圖像處理算法的基本理論知識(shí),使用Verilog HDL實(shí)現(xiàn)了多種算法,并完成了功能仿真;第五章完成了線陣CCD下位機(jī)閉環(huán)檢焦系統(tǒng)的實(shí)驗(yàn)驗(yàn)證工作,實(shí)驗(yàn)結(jié)果表明,該系統(tǒng)檢焦精度優(yōu)于1μm,行程約為400μm,檢焦頻率達(dá)到1.3KHz,速度有大幅提升,滿足設(shè)計(jì)指標(biāo);最后總結(jié)與展望部分對(duì)本論文所完成的工作做了總結(jié),對(duì)下一步研究工作提出了自己的意見。
[Abstract]:With the improvement of the resolution of optical projection lithography, the focal depth of the projective objective lens is gradually shortened, usually at the level of 100 nanometers, in order to make full use of the limited focal depth of the objective lens. High precision focusing and focusing technology has become a hot research, and the projection lithography has entered the step scanning era and the size of silicon wafer is increasing, which makes the focusing and focusing system ensure the accuracy of the system. It is necessary to take into account the real-time and frequency of focusing and focusing simultaneously. Most of the existing coarse coke detection technologies are photometric focusing techniques. Using four-quadrant detector or area array CCD to collect the intensity signal with the information of the defocus of silicon wafer. The TYG2000/T stepwise projection lithography machine of the Institute of Optoelectronics of the Chinese Academy of Sciences adopts photometric focusing technology. Image processing on the computer to complete the focal detection, finally through the serial port control workpiece platform to compensate for the defocus. This method in the host computer to complete the closed loop, transmission redundancy, low focusing frequency. In the process of workpiece stepping, it is not possible to focus and focus in real time, and the yield is not high. In view of this, a linear array CCD is proposed to capture images. Using FPGA as the processor to complete the closed-loop focal detection scheme, this scheme utilizes the high-speed of linear CCD and the parallelism of FPGA, and combines sub-pixel image location algorithm. Under the condition that the accuracy of coke detection is better than 1 渭 m and the measuring range is more than 200 渭 m, the frequency of coke detection is greatly increased, and the real-time detection of coke is realized in the process of workpiece step by step, and the cost is reduced. This paper introduces the design and experimental process of the closed loop high speed focus detection system of linear CCD slave computer. In the first chapter, it introduces the research status and development direction of lithography technology and focus detection technology. The second chapter introduces the related knowledge of CCD and Camera Link protocol in detail. On this basis, the design and optimization of the whole system scheme are carried out. In the third chapter, the hardware design process and the experience and lessons of the circuit board are shared. In chapter 4th, the basic theory of image processing algorithm is analyzed, and a variety of algorithms are implemented with Verilog HDL, and the functional simulation is completed. In Chapter 5th, the experimental verification of the closed loop focal detection system of linear CCD lower computer is completed. The experimental results show that the accuracy of the system is better than 1 渭 m and the stroke is about 400 渭 m. The frequency of coke detection reaches 1.3 KHz, and the speed is greatly improved to meet the design target. In the last part, the author summarizes the work done in this paper, and puts forward his own opinions on the next research work.
【學(xué)位授予單位】:中國(guó)科學(xué)院研究生院(光電技術(shù)研究所)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2015
【分類號(hào)】:TN305.7
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