發(fā)布時(shí)間：2018-02-11 10:03

  本文關(guān)鍵詞： 嵌入式處理器 杜比AC-3 音頻編解碼 無(wú)線傳輸　出處：《杭州電子科技大學(xué)》2013年碩士論文　論文類型：學(xué)位論文

【摘要】：隨著嵌入式技術(shù)的不斷發(fā)展，嵌入式音頻技術(shù)也得到了極其廣泛的應(yīng)用�；谇度胧教幚砥鞯囊纛l解決方案以其高效性，靈活性等受到了越來(lái)越廣泛的關(guān)注。目前市場(chǎng)上，占據(jù)主導(dǎo)地位的音頻方案基本上都是基于ARM，DSP等國(guó)外主流微處理器開(kāi)發(fā)的�；趪�(guó)內(nèi)嵌入式處理器的音頻技術(shù)亟待研究。WN6102正是一款主要針對(duì)嵌入式音頻應(yīng)用領(lǐng)域的32位嵌入式處理器，其具有自主的知識(shí)產(chǎn)權(quán)。 任何一個(gè)完善的嵌入式音頻方案，必定離不開(kāi)音頻算法的支持。音頻編解碼算法所需的運(yùn)算相當(dāng)頻繁且運(yùn)算量巨大，而嵌入式處理器的處理速度和存儲(chǔ)空間又是相當(dāng)有限的，音頻算法往往占用了大半的CPU資源。音頻編解碼技術(shù)有許多種，在WN6102平臺(tái)上可以更好地實(shí)現(xiàn)這些音頻編解碼技術(shù)。 論文首先介紹了WN6102的特性及音頻編解碼相關(guān)技術(shù)原理，之后在WN6102平臺(tái)上實(shí)現(xiàn)了杜比AC-3音頻解碼算法，，并對(duì)該算法進(jìn)行了性能優(yōu)化研究。在優(yōu)化實(shí)現(xiàn)過(guò)程中，論文以杜比AC-3解碼過(guò)程中計(jì)算量最大的逆改進(jìn)離散余弦變換(Inverse Modified DiscreteCosine Transform, IMDCT)為優(yōu)化對(duì)象，先通過(guò)理論推導(dǎo)實(shí)現(xiàn)運(yùn)算過(guò)程的簡(jiǎn)化，并在VC6.0平臺(tái)上驗(yàn)證實(shí)現(xiàn)該算法。之后，論文將優(yōu)化后的杜比AC-3解碼算法移植到WN6102平臺(tái)上，并結(jié)合WN6102特有的音頻加速模塊(AudioAccelerator,AUAC)對(duì)該算法做了進(jìn)一步的性能優(yōu)化，即將軟件實(shí)現(xiàn)的IMDCT運(yùn)算優(yōu)化成硬件模塊直接完成運(yùn)算。實(shí)驗(yàn)結(jié)果證明，優(yōu)化后的杜比AC-3解碼算法在完成相同的時(shí)頻轉(zhuǎn)換條件下，顯著提升了系統(tǒng)運(yùn)算速度，有效節(jié)省了系統(tǒng)資源。WN6102在音頻編解碼技術(shù)實(shí)現(xiàn)過(guò)程中所特有音頻加速功能，體現(xiàn)了其在音頻應(yīng)用領(lǐng)域所具有的優(yōu)越性。 論文在研究了杜比AC-3音頻解碼優(yōu)化技術(shù)后，基于WN6102處理器設(shè)計(jì)開(kāi)發(fā)了一套無(wú)線音頻傳輸方案。該無(wú)線音頻傳輸方案的設(shè)計(jì)包括發(fā)送端和接收端兩部分的軟硬件設(shè)計(jì)。兩部分的硬件電路主要由核心處理器—WN6102、D/A轉(zhuǎn)換芯片、外部FLASH存儲(chǔ)器和無(wú)線傳輸模塊等組成。本文著重介紹了設(shè)計(jì)方案的軟件實(shí)現(xiàn)，包括發(fā)送端與接收端工作時(shí)的整體軟件流程設(shè)計(jì)、無(wú)線傳輸時(shí)的跳頻協(xié)議設(shè)計(jì)及應(yīng)用于無(wú)線音頻傳輸?shù)囊纛l編解碼算法開(kāi)發(fā)等。最后對(duì)該設(shè)計(jì)方案結(jié)果做了相關(guān)性能測(cè)試驗(yàn)證。實(shí)驗(yàn)結(jié)果證明WN6102處理器可以很好的滿足嵌入式音頻方案的開(kāi)發(fā)，其在嵌入式音頻領(lǐng)域勢(shì)必?fù)碛袕V闊的發(fā)展前景。
[Abstract]:With the development of embedded technology, embedded audio technology has been widely used. The audio solution based on embedded processor has been paid more and more attention for its high efficiency and flexibility. The dominant audio schemes are basically developed on the basis of mainstream microprocessors such as ARMU DSP. The audio technology based on embedded processors in China needs to be studied urgently. WN6102 is a kind of audio technology which is mainly aimed at embedded audio applications. 32-bit embedded processor, It has independent intellectual property rights. Any perfect embedded audio scheme must depend on the support of audio algorithm. Audio codec algorithm needs a lot of computation, and the processing speed and storage space of embedded processor are very limited. Audio algorithms often occupy more than half of CPU resources. There are many audio coding and decoding technologies, which can be better implemented on WN6102 platform. This paper first introduces the characteristics of WN6102 and the principle of audio coding and decoding technology, then implements the Dolby AC-3 audio decoding algorithm on the WN6102 platform, and studies the performance optimization of the algorithm. In this paper, the inverse Modified DiscreteCosine transform (IMDCT), which is the most computationally expensive in the AC-3 decoding process, is taken as the optimization object. Firstly, the algorithm is simplified by theoretical derivation, and the algorithm is verified on the VC6.0 platform. In this paper, the optimized Dolby AC-3 decoding algorithm is transplanted to the WN6102 platform, and the performance of the algorithm is further optimized based on the audio acceleration module (Audio Accelerator AUAC) of WN6102. The IMDCT operation realized by the software is optimized to the hardware module to complete the operation directly. The experimental results show that the optimized Dolby AC-3 decoding algorithm can significantly improve the speed of the system under the same time-frequency conversion condition. The system resource. WN6102 has been saved the unique audio acceleration function in the realization of audio coding and decoding technology, which embodies its superiority in the field of audio application. After studying the optimization technology of Dolby AC-3 audio decoding, A wireless audio transmission scheme based on WN6102 processor is designed and developed. The design of the wireless audio transmission scheme includes the hardware and software design of the transmitter and receiver. The hardware circuit of the two parts is mainly composed of the core processor -WN6102 / D / A conversion chip. This paper mainly introduces the software implementation of the design scheme, including the whole software flow design of the transmitter and receiver. The design of frequency hopping protocol in wireless transmission and the development of audio coding and decoding algorithm applied in wireless audio transmission are discussed. Finally, the performance of the design is tested and verified. The experimental results show that the WN6102 processor can be very good. Satisfy the development of embedded audio scheme, It is bound to have a broad development prospect in the embedded audio field.
【學(xué)位授予單位】：杭州電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2013
【分類號(hào)】：TP368.1;TN912.3

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